Authors:
- Explains HPC from general optimization and parallel programming concepts to the details of MIC programming
- Illustrates all concepts with both a standard example and extracts of real-world applications
- Written by a team closely involved in the development of the Intel® Xeon Phi™ coprocessor, the backbone of the fastest supercomputer in the world (Tianhe-2)
- Includes supplementary material: sn.pub/extras
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Table of contents (11 chapters)
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Front Matter
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Performance Optimization
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Front Matter
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Project Development
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Front Matter
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Back Matter
About this book
The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi™ series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors’ first-hand optimization experience.
The material is organized in three sections. The first section, “Basics of MIC”, introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on “Performance Optimization” explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, “Project development” presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.
This book appeals to two main audiences: First, software developers for HPC applications – it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing – it will guide them on how to push the limits of system performance for HPC applications.
Authors and Affiliations
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Inspur, Beijing, China
Endong Wang, Qing Zhang, Bo Shen, Guangyong Zhang, Xiaowei Lu, Qing Wu, Yajuan Wang
About the authors
Bibliographic Information
Book Title: High-Performance Computing on the Intel® Xeon Phi™
Book Subtitle: How to Fully Exploit MIC Architectures
Authors: Endong Wang, Qing Zhang, Bo Shen, Guangyong Zhang, Xiaowei Lu, Qing Wu, Yajuan Wang
DOI: https://doi.org/10.1007/978-3-319-06486-4
Publisher: Springer Cham
eBook Packages: Computer Science, Computer Science (R0)
Copyright Information: Springer International Publishing Switzerland 2014
Hardcover ISBN: 978-3-319-06485-7Published: 11 July 2014
Softcover ISBN: 978-3-319-35879-6Published: 01 October 2016
eBook ISBN: 978-3-319-06486-4Published: 26 June 2014
Edition Number: 1
Number of Pages: XXIII, 338
Number of Illustrations: 153 b/w illustrations
Topics: Processor Architectures, Computational Science and Engineering, Circuits and Systems, Software Engineering, Special Purpose and Application-Based Systems