Reconfigurable Computing: Architectures, Tools, and Applications

1. Front Matter

   PDF

2. Regular Papers

   1. Applications I

      1. FPGA-Based Parallel DBSCAN Architecture

         • Neil Scicluna, Christos-Savvas Bouganis

         Pages 1-12

      2. FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm

         • Karim M. Abdellatif, R. Chotin-Avot, H. Mehrez

         Pages 13-24

      3. Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable Devices

         • Pascal Sasdrich, Tim Güneysu

         Pages 25-36

      4. Accelerating Heap-Based Priority Queue in Image Coding Application Using Parallel Index-Aware Tree Access

         • Yuhui Bai, Syed Zahid Ahmed, Bertrand Granado

         Pages 37-48

   2. Methods, Frameworks and OS for Debug, Over-Clocking and Relocation

      1. A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation

         • Rui Policarpo Duarte, Christos-Savvas Bouganis

         Pages 49-60

      2. Relocatable Hardware Threads in Run-Time Reconfigurable Systems

         • Alexander Wold, Andreas Agne, Jim Torresen

         Pages 61-72

      3. Faster FPGA Debug: Efficiently Coupling Trace Instruments with User Circuitry

         • Eddie Hung, Jeffrey B. Goeders, Steven J. E. Wilton

         Pages 73-84

   3. Memory Architectures

      1. On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA’s Configuration Infrastructure

         • Karel Heyse, Dirk Stroobandt, Oliver Kadlcek, Oliver Pell

         Pages 85-96

      2. Towards Dynamic Cache and Bandwidth Invasion

         • Carsten Tradowsky, Martin Schreiber, Malte Vesper, Ivan Domladovec, Maximilian Braun, Hans-Joachim Bungartz et al.

         Pages 97-107

      3. Stand-Alone Memory Controller for Graphics System

         • Tassadaq Hussain, Oscar Palomar, Osman S. Ünsal, Adrian Cristal, Eduard Ayguadé, Mateo Valero et al.

         Pages 108-120

   4. Methodologies and Tools I

      1. Evaluating High-Level Program Invariants Using Reconfigurable Hardware

         • Joonseok Park, Pedro C. Diniz

         Pages 121-132

      2. Automated Data Flow Graph Partitioning for a Hierarchical Approach to Wordlength Optimization

         • Enrique Sedano, Daniel Menard, Juan A. López

         Pages 133-143

      3. Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer

         • Tobias Kenter, Gavin Vaz, Christian Plessl

         Pages 144-155

   5. Architectures I

      1. Enhanced Radiation Tolerance of an Optically Reconfigurable Gate Array by Exploiting an Inversion/Non-inversion Implementation

         • Takashi Yoza, Minoru Watanabe

         Pages 156-166

      2. Hardware-Accelerated Data Compression in Low-Power Wireless Sensor Networks

         • Andreas Engel, Andreas Koch

         Pages 167-178

      3. OCP2XI Bridge: An OCP to AXI Protocol Bridge

         • Zdravko Panjkov, Juergen Haas, Martin Aigner, Herbert Rosmanith, Tianlun Liu, Roland Poppenreiter et al.

         Pages 179-190

3. Short Papers

   1. Applications II

      1. FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis

         • Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri

         Pages 191-196

      2. A Synthesizable Multicore Platform for Microwave Imaging

         • Pascal Schleuniger, Sven Karlsson

         Pages 197-204

      3. <b>An Efficient Implementation of the Adams-Hamilton’s Demosaicing Algorithm in FPGAs</b>

         • Jalal Khalifat, Ali Ebrahim, Tughrul Arslan

         Pages 205-212

This book constitutes the thoroughly refereed conference proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2014, held in Vilamoura, Portugal, in April 2014. The 16 revised full papers presented together with 17 short papers and 6 special session papers were carefully reviewed and selected from 57 submissions. The topics covered are applications; methods, frameworks and OS for debug, over-clocking, and relocation; memory architectures; methodologies and tools and architectures.

• FPGA
• algorithms
• computer system organization
• field-programmable gate array
• hardware
• integrated circuits
• logic circuits
• memory architectures
• multicore architectures
• parallel architectures
• reconfigurable computing
• runtime
• algorithm analysis and problem complexity

• Ruhr-Universität Bochum, Bochum, Germany

  Diana Goehringer

• DEIB, Politecnico di Milano, Milano, Italy

  Marco Domenico Santambrogio

• Faculty of Engineering (FEUP), University of Porto, Porto, Portugal

  João M. P. Cardoso

• Computer Engineering Laboratory, Delft University of Technology, Delft, The Netherlands

  Koen Bertels

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