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High-Bandwidth Memory Interface

  • Book
  • © 2014

Overview

  • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design
  • Presents state-of-the-art techniques for memory interface design
  • Covers memory interface design at both the circuit level and system architecture level
  • Includes supplementary material: sn.pub/extras

Part of the book series: SpringerBriefs in Electrical and Computer Engineering (BRIEFSELECTRIC)

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Table of contents (5 chapters)

Keywords

About this book

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.

Authors and Affiliations

  • Department of Electrical Engineering #418 Engineering Bldg., Korea University, Seoul, Korea, Republic of (South Korea)

    Chulwoo Kim, Junyoung Song

  • SK-Hynix, Icheon-si, Korea, Republic of (South Korea)

    Hyun-Woo Lee

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