Automated Methods in Cryptographic Fault Analysis

This book presents a collection of automated methods that are useful for different aspects of fault analysis in cryptography. The first part focuses on automated analysis of symmetric cipher design specifications, software implementations, and hardware circuits. The second part provides automated deployment of countermeasures. The third part provides automated evaluation of countermeasures against fault attacks.  Finally, the fourth part focuses on automating fault attack experiments. The presented methods enable software developers, circuit designers, and cryptographers to test and harden their products. 

• Fault Analysis in Cryptography
• Hardware Security
• Fault Tolerant Architectures for Cryptography
• cipher design specifications
• Cipher Design Level Countermeasures

• Underwriters Laboratories, Singapore, Singapore

  Jakub Breier

• Acronis, Singapore, Singapore

  Xiaolu Hou

• Temasek Laboratories, Nanyang Technological University, Singapore, Singapore

  Shivam Bhasin

Jakub Breier currently works as a Senior Cryptography Security Analyst at Underwriters Laboratories, Singapore since 2018, focusing on security evaluation of payment schemes. He finished his PhD in Applied Informatics from Slovak University of Technology in 2013. Before his current role, he worked as a Senior Research Scientist at Physical Analysis and Cryptographic Engineering laboratory at Nanyang Technological University, Singapore between 2013-2018. His main interests include physical attacks on cryptographic circuits, more specifically fault and side-channel attacks with emphasis on automated methods for fault analysis. His research has been published at major venues in computer/hardware security and cryptography.

 Xiaolu Hou works as a Secure Computing Researcher at Acronis, Singapore since 2018, in the field of secure multi-party computation. She finished her PhD in Mathematics from Nanyang Technological University (NTU) in 2017. During herPhD studies, she was half year with Singapore University of Technology and Design, where she was doing research in location privacy. After her PhD she joined Cyber Security Laboratory, School of Computer Science and Engineering, NTU, as a Research Fellow. Her research focuses on fault injection and side-channel attacks. With a wide range of research interests, she has published her work at top venues within various fields.

 Shivam Bhasin is a Senior Research Scientist and Principal Investigator at Physical Analysis and Cryptographic Engineering group, Temasek Laboratories, Nanyang Technological University, Singapore since 2015. His research interests include embedded security, trusted computing and secure designs. He received his PhD from Telecom Paristech in 2011, Master’s from Mines Saint-Etienne, France in 2008 and Bachelor’s from UP Tech, India in 2007. Before NTU, Shivam held position of Research Engineer in Institut Mines-Telecom, France. He was also a visiting researcher at UCL, Belgium (2011) and Kobe University, Japan (2013). He regularly publishes at top peer reviewed journals and conferences. Some of his research now also forms a part of ISO/IEC 17825 standard

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