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Fast Simulation of Computer Architectures

  • Book
  • © 1995

Overview

Editors:
  1. Thomas M. Conte

    1. University of South Carolina, Columbia, USA

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    You can also search for this editor in PubMed   Google Scholar

  2. Charles E. Gimarc

    1. AT & T Global Information Solutions, West Columbia, USA

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    You can also search for this editor in PubMed   Google Scholar

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-ix
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  2. Introduction

    • Thomas M. Conte, Charles E. Gimarc
    Pages 1-4

  3. Shade: A Fast Instruction-Set Simulator for Execution Profiling

    • Bob Cmelik, David Keppel
    Pages 5-46

  4. Instrumentation Tools

    • Jim Pierce, Michael D. Smith, Trevor Mudge
    Pages 47-86

  5. Stack-Based Single-Pass Cache Simulation

    • Thomas M. Conte
    Pages 87-107

  6. Non-Stack Single-Pass Simulation

    • Rabin A. Sugumar, Santosh G. Abraham
    Pages 109-144

  7. Execution Driven Simulation of Shared Memory Multiprocessors

    • Bob Boothe
    Pages 145-170

  8. Sampling for Cache and Processor Simulation

    • Kishore N. Menezes
    Pages 171-203

  9. Performance Bounds for Rapid Computer System Evaluation

    • Bill Mangione-Smith
    Pages 205-237

  10. Back Matter

    Pages 239-244
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Keywords

About this book

Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive.
Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.

Editors and Affiliations

  • University of South Carolina, Columbia, USA

    Thomas M. Conte

  • AT & T Global Information Solutions, West Columbia, USA

    Charles E. Gimarc

Bibliographic Information

  • Book Title: Fast Simulation of Computer Architectures

  • Editors: Thomas M. Conte, Charles E. Gimarc

  • DOI: https://doi.org/10.1007/978-1-4615-2361-1

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer Science+Business Media New York 1995

  • Hardcover ISBN: 978-0-7923-9593-5Published: 30 June 1995

  • Softcover ISBN: 978-1-4613-6002-5Published: 12 October 2012

  • eBook ISBN: 978-1-4615-2361-1Published: 06 December 2012

  • Edition Number: 1

  • Number of Pages: IX, 244

  • Topics: Processor Architectures, Computer Systems Organization and Communication Networks

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