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Model Generation in Electronic Design

  • Book
  • © 1995

Overview

Editors:
  1. Jean-Michel Bergé

    1. France Telecom-CNET, France

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    You can also search for this editor in PubMed   Google Scholar

  2. Oz Levia

    1. Synopsis, USA

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    You can also search for this editor in PubMed   Google Scholar

  3. Jacques Rouillard

    1. ESIM, Germany

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    You can also search for this editor in PubMed   Google Scholar

Part of the book series: Current Issues in Electronic Modeling (CIEM, volume 1)

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Table of contents (8 chapters)

  1. Front Matter

    Pages I-XVIII
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  2. A Flexible Generator of Component Models

    • Marcus Blüml, Frédérique Bouchard, Adam Pawlak
    Pages 1-19

  3. What Makes an ASIC Library Sign-Off?

    • Greg Haynes
    Pages 21-30

  4. A Case History in Building Vital-Compliant Models

    • Przemyslaw Bakowski, Frédérique Bouchard, Jean-Paul Caïsso, Frédéric Igier
    Pages 31-42

  5. Modeling Multiple Driver Net Delay in Simulation

    • Ray Ryan
    Pages 43-62

  6. DELPHI: The Development of Libraries of Physical Models of Electronic Components for an Integrated Design Environment

    • Harvey I Rosten, Clemens J M Lasance
    Pages 63-89

  7. VHDL Floating Point Operations

    • George S. Powley Jr., Joanne E. DeGroat
    Pages 91-103

  8. Symbolic Model Checking with Past and Future Temporal Modalities: Fundamentals and Algorithms

    • David Déharbe, Dominique Borrione
    Pages 105-126

  9. KRYPTON: Portable, Non-Reversible Encryption for VHDL

    • Kevin O’Brien, Serge Maginot
    Pages 127-151

  10. Back Matter

    Pages 153-155
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Keywords

About this book

Model Generation in Electronic Design covers a wide range of model applications and research. The book begins by describing a model generator to create component models. It goes on to discuss ASIC design and ASIC library generation. This section includes chapters on the requirements for developing and ASIC library, a case study in which VITAL is used to create such a library, and the analysis and description of the accuracy required in modeling interconnections in ASIC design.
Other chapters describe the development of thermal models for electronic devices, the development of a set of model packages for VHDL floating point operations, a techniques for model validation and verification, and a tool for model encryption.
Model Generation in Electronic Design is an essential update for users, vendors, model producers, technical managers, designers and researchers working in electronic design.

Editors and Affiliations

  • France Telecom-CNET, France

    Jean-Michel Bergé

  • Synopsis, USA

    Oz Levia

  • ESIM, Germany

    Jacques Rouillard

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