Authors:
Buy it now
Buying options
Tax calculation will be finalised at checkout
Other ways to access
This is a preview of subscription content, log in via an institution to check for access.
Table of contents (9 chapters)
-
Front Matter
-
Back Matter
About this book
The goal of this book is to investigate how formal methods can be applied to the domain of embedded system design. The emphasis is on the specification, representation, validation, and design exploration of such systems from a high-level perspective. The authors review the framework upon which the theories and experiments are based, and through which the formal methods are linked to synthesis and simulation.
A formal verification methodology is formulated to verify general properties of the designs and demonstrate that this methodology is efficient in dealing with the problem of complexity and effective in finding bugs. However, manual intervention in the form of abstraction selection and separation of timing and functionality is required. It is conjectured that, for specific properties, efficient algorithms exist for completely automatic formal validations of systems.
Synchronous Equivalence: Formal Methods for Embedded Systems presents a brand new formal approach to high-level equivalence analysis. It opens design exploration avenues previously uncharted. It is a work that can stand alone but at the same time is fully compatible with the synthesis and simulation framework described in another book by Kluwer Academic Publishers Hardware-Software Co-Design of Embedded Systems: The POLIS Approach, by Balarin et al.
Synchronous Equivalence: Formal Methods for Embedded Systems will be of interest to embedded system designers (automotive electronics, consumer electronics, and telecommunications), micro-controller designers, CAD developers and students, as well as IP providers, architecture platform designers, operating system providers, and designers of VLSI circuits and systems.
Authors and Affiliations
-
University of California at Berkeley, USA
Harry Hsieh, Alberto Sangiovanni-Vincentelli
-
Cadence Berkeley Laboratories, USA
Felice Balarin
Bibliographic Information
Book Title: Synchronous Equivalence
Book Subtitle: Formal Methods for Embedded Systems
Authors: Harry Hsieh, Felice Balarin, Alberto Sangiovanni-Vincentelli
DOI: https://doi.org/10.1007/978-1-4615-1659-0
Publisher: Springer New York, NY
-
eBook Packages: Springer Book Archive
Copyright Information: Springer Science+Business Media New York 2001
Hardcover ISBN: 978-0-7923-7262-2Published: 31 December 2000
Softcover ISBN: 978-1-4613-5664-6Published: 05 November 2012
eBook ISBN: 978-1-4615-1659-0Published: 06 December 2012
Edition Number: 1
Number of Pages: XI, 136
Topics: Circuits and Systems, Artificial Intelligence, Computer-Aided Engineering (CAD, CAE) and Design, Electrical Engineering