Overview
- Editors:
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Karl J. Puttlitz
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Paul A. Totta
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Table of contents (28 chapters)
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Front Matter
Pages i-lxviii
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History of Flip Chip and Area Array Technology
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Chip-Level Technology
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- Paul Totta, Glenn Rinne, Peter Elenius, Michael Varnau, Thomas Oppert, Elke Zakel et al.
Pages 39-116
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- Gobinda Das, Franco Motika, Eugene Atwood
Pages 117-148
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- Claude L. Bertin, Lo-Soun Su, Jody Van Horn
Pages 149-200
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- Lyman R. Clark, Mark Brown, Scott Evans, Steve Bedore, Charles E. Gutentag, Robert A. Sierra
Pages 201-227
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- John U. Knickerbocker, Thomas F. Redmond
Pages 228-267
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- Happy T. Holden, Donald Barr, Douglas Powell
Pages 268-314
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- Peter J. Brofman, Karl J. Puttlitz, Kathleen A. Stalter, Charles Woychik
Pages 315-349
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- Karl J. Puttlitz, Kathleen A. Stalter
Pages 350-370
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- David L. Edwards, Barrie C. Campbell, James H. Covell II, Kenneth C. Marston, Camille Proietti-Bowne
Pages 371-420
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- Eugene Atwood, Glenn Daves
Pages 421-451
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- Stephen L. Buchwalter, Maurice E. Edwards, Daniel Gamota, Michael A. Gaynes, Son K. Tran
Pages 452-499
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- Giulio DiGiacomo, Jasvir S. Jaspal
Pages 500-548
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Package-Level Technology
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Front Matter
Pages 549-549
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- Balaram Ghosal, Richard Sigliano, Y. Kunimatsu
Pages 551-576
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- Mark J. Kuzawinski, Thomas R. Homa
Pages 577-613
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- Marie S. Cole, Karl J. Puttlitz, Robert Lanzone
Pages 656-701
About this book
Microelectronic packaging has been recognized as an important "enabler" for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.
