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  • © 2002

Energy Efficient Microprocessor Design

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Table of contents (11 chapters)

  1. Front Matter

    Pages i-xii
  2. Introduction

    • Thomas D. Burd, Robert W. Brodersen
    Pages 1-6
  3. Energy Efficient Design

    • Thomas D. Burd, Robert W. Brodersen
    Pages 7-43
  4. Microprocessor System Architecture

    • Thomas D. Burd, Robert W. Brodersen
    Pages 45-78
  5. Circuit Design Methodology

    • Thomas D. Burd, Robert W. Brodersen
    Pages 79-124
  6. Energy Driven Design Flow

    • Thomas D. Burd, Robert W. Brodersen
    Pages 125-167
  7. Microprocessor and Memory IC’s

    • Thomas D. Burd, Robert W. Brodersen
    Pages 169-215
  8. DC-DC Voltage Conversion

    • Thomas D. Burd, Robert W. Brodersen
    Pages 217-250
  9. DC-DC Converter IC for DVS

    • Thomas D. Burd, Robert W. Brodersen
    Pages 251-282
  10. DVS System Design and Results

    • Thomas D. Burd, Robert W. Brodersen
    Pages 283-304
  11. Software and Operating System Support

    • Thomas D. Burd, Robert W. Brodersen
    Pages 305-350
  12. Conclusions

    • Thomas D. Burd, Robert W. Brodersen
    Pages 351-354
  13. Back Matter

    Pages 355-357

About this book

This work began in 1995 as an outgrowth of the InfoPad project which showed us that in order to reduce the energy consumption of a portable multimedia terminal that something had to be done about the consumption of the microprocessor subsystem. The design of the InfoPad attempted to reduce the requirements of this general pur­ pose processor by moving the computation into the network or by the use of highly optimized integrated circuits, but in spite of these efforts it still was a major consumer of energy. The reasons for this became apparent as we determined that the energy required to perform a function in dedicated hardware could be several orders of magnitude lower than that consumed in the InfoPad microprocessor. We therefore set out on a full fledged attack on all aspects of the microprocessor energy consumption [1 J. After considerable analysis it became clear that though better circuit design and a stream­ lined architecture would assist in our goal of energy reduction, that the biggest gains were to be found by operating at reduced voltages. For the busses and VO this could be accomplished without significant degradation of the processor performance, but this was not a straightforward solution when applied to the core of the processor sub­ system (CPU and memory).

Authors and Affiliations

  • Berkeley Wireless Research Center, University of California, Berkeley, USA

    Thomas D. Burd, Robert W. Brodersen

Bibliographic Information

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access