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  • © 2015

Circuit Design for Reliability

  • Provides comprehensive review on various reliability mechanisms at sub-45nm nodes
  • Describes practical modeling and characterization techniques for reliability
  • Includes thorough presentation of robust design techniques for major VLSI design units
  • Promotes physical understanding with first-principle simulations
  • Includes supplementary material: sn.pub/extras

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Table of contents (12 chapters)

  1. Front Matter

    Pages i-vi
  2. Introduction

    • Ricardo Reis, Yu Cao, Gilson Wirth
    Pages 1-4
  3. Recent Trends in Bias Temperature Instability

    • B. Kaczer, T. Grasser, J. Franco, M. Toledano-Luque, J. Roussel, M. Cho et al.
    Pages 5-19
  4. Atomistic Simulations on Reliability

    • Dragica Vasileska, Nabil Ashraf
    Pages 47-67
  5. On-Chip Characterization of Statistical Device Degradation

    • Takashi Sato, Hiromitsu Awano
    Pages 69-92
  6. Compact Modeling of BTI for Circuit Reliability Analysis

    • Ketul B. Sutaria, Jyothi B. Velamala, Athul Ramkumar, Yu Cao
    Pages 93-119
  7. Circuit Resilience Roadmap

    • Veit B. Kleeberger, Christian Weis, Ulf Schlichtmann, Norbert Wehn
    Pages 121-143
  8. Layout Aware Electromigration Analysis of Power/Ground Networks

    • Di-an Li, Malgorzata Marek-Sadowska, Sani R. Nassif
    Pages 145-173
  9. Power-Gating for Leakage Control and Beyond

    • Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
    Pages 175-205
  10. Soft Error Rate and Fault Tolerance Techniques for FPGAs

    • Fernanda Kastensmidt, Ricardo Reis
    Pages 207-221
  11. Low Power Robust FinFET-Based SRAM Design in Scaled Technologies

    • Sumeet Kumar Gupta, Kaushik Roy
    Pages 223-253
  12. Variability-Aware Clock Design

    • Matthew R. Guthaus, Gustavo Wilke
    Pages 255-272

About this book

This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.

Editors and Affiliations

  • Instituto de Informática, Universidade Federal do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil

    Ricardo Reis, Gilson Wirth

  • School of ECEE, Arizona State University, Tempe, USA

    Yu Cao

Bibliographic Information

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 129.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access