Skip to main content

SRAM Design for Wireless Sensor Networks

Energy Efficient and Variability Resilient Techniques

  • Book
  • © 2013

Overview

  • Discusses fundamentals of energy reduction for SRAM circuits and applies them to energy limitation challenges associated with wireless sensor nodes
  • Explains impact of variability resilience in reducing the energy consumption
  • Describes various memory architectures and provides detailed overview of different types of SRAM cells
  • Includes sense amplifier design techniques for solving energy-offset tradeoff
  • Includes supplementary material: sn.pub/extras

Part of the book series: Analog Circuits and Signal Processing (ACSP)

This is a preview of subscription content, log in via an institution to check access.

Access this book

eBook USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (8 chapters)

Keywords

About this book

This book features various, ultra low energy, variability resilient SRAM circuit design techniques for wireless sensor network applications. Conventional SRAM design targets area efficiency and high performance at the increased cost of energy consumption, making it unsuitable for computation-intensive sensor node applications.  This book, therefore, guides the reader through different techniques at the circuit level for reducing   energy consumption and increasing the variability resilience. It includes a detailed review of the most efficient circuit design techniques and trade-offs, introduces new memory architecture techniques, sense amplifier circuits and voltage optimization methods for reducing the impact of variability for the advanced technology nodes.   

Authors and Affiliations

  • , ESAT-MICAS, K.U. Leuven, K.U. Leuven, Heverlee, Belgium

    Vibhu Sharma, Wim Dehaene

  • , Departement ESAT - IMEC, IMEC, Heverlee, Belgium

    Francky Catthoor

Bibliographic Information

Publish with us