Authors:
- Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes
- Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package
- Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources
- Helps readers to translate reliability methodology into real design flows
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Table of contents (5 chapters)
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Front Matter
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Back Matter
About this book
Authors and Affiliations
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Cypress Semiconductor, San Diego, USA
Artur Balasinski
About the author
Artur Balasinski is a Technology Design Integration Manager for Cypress Semiconductor in San Jose, California.
Bibliographic Information
Book Title: Design for Manufacturability
Book Subtitle: From 1D to 4D for 90–22 nm Technology Nodes
Authors: Artur Balasinski
DOI: https://doi.org/10.1007/978-1-4614-1761-3
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media New York 2014
Hardcover ISBN: 978-1-4614-1760-6
Softcover ISBN: 978-1-4939-4342-5
eBook ISBN: 978-1-4614-1761-3
Edition Number: 1
Number of Pages: VIII, 278
Number of Illustrations: 169 b/w illustrations, 45 illustrations in colour
Topics: Circuits and Systems, Electronics and Microelectronics, Instrumentation, Quality Control, Reliability, Safety and Risk