Overview
- Editors:
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Michel Dubois
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University of Southern California, USA
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Shreekant Thakkar
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Sequent Computer Systems, USA
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Table of contents (17 chapters)
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Access Order and Synchronization
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- Pradeep S. Sindhu, Jean-Marc Frailong, Michel Cekleov
Pages 25-41
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- Mark A. Holliday, Carla S. Ellis
Pages 43-57
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- Joonwon Lee, Umakishore Ramachandran
Pages 59-87
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Performance
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- Andrew Ladd, Trevor Mudge, Oyekunle Olukotun
Pages 97-129
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- Elana D. Granston, Stephen W. Turner, Alexander V. Veidenbaum
Pages 131-151
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- Manu Thapar, Bruce Delagi
Pages 153-166
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- Anoop Gupta, Wolf-Dietrich Weber, Todd Mowry
Pages 167-192
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Cache Protocols and Architectures
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- Erik Hagersten, Anders Landin, Seif Haridi
Pages 193-205
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- Stein Gjessing, David B. Gustavson, James R. Goodman, David V. James, Ernst H. Kristiansen
Pages 219-237
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- Anant Agarwal, David Chaiken, Kirk Johnson, David Kranz, John Kubiatowicz, Kiyoshi Kurihara et al.
Pages 239-261
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Distributed Shared Memory
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- John K. Bennett, John B. Carter, Willy Zwaenepoel
Pages 281-300
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- R. Bisiani, M. Ravishankar
Pages 301-311
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- Tam M. Nguyen, Vason P. Srini
Pages 313-329
About this book
The workshop on Scalable Shared Memory Multiprocessors took place on May 26 and 27 1990 at the Stouffer Madison Hotel in Seattle, Washington as a prelude to the 1990 International Symposium on Computer Architecture. About 100 participants listened for two days to the presentations of 22 invited The motivation for this workshop was to speakers, from academia and industry. promote the free exchange of ideas among researchers working on shared-memory multiprocessor architectures. There was ample opportunity to argue with speakers, and certainly participants did not refrain a bit from doing so. Clearly, the problem of scalability in shared-memory multiprocessors is still a wide-open question. We were even unable to agree on a definition of "scalability". Authors had more than six months to prepare their manuscript, and therefore the papers included in this proceedings are refinements of the speakers' presentations, based on the criticisms received at the workshop. As a result, 17 authors contributed to these proceedings. We wish to thank them for their diligence and care. The contributions in these proceedings can be partitioned into four categories 1. Access Order and Synchronization 2. Performance 3. Cache Protocols and Architectures 4. Distributed Shared Memory Particular topics on which new ideas and results are presented in these proceedings include: efficient schemes for combining networks, formal specification of shared memory models, correctness of trace-driven simulations,synchronization, various coherence protocols, .
Editors and Affiliations
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University of Southern California, USA
Michel Dubois
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Sequent Computer Systems, USA
Shreekant Thakkar