Overview
- Authors:
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Patrick Dewilde
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Delft University of Technology, Netherlands
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Zhen-Qui Ning
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Delft University of Technology, Netherlands
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Table of contents (12 chapters)
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Front Matter
Pages i-xiii
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- Patrick Dewilde, Zhen-Qui Ning
Pages 1-38
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- Patrick Dewilde, Zhen-Qui Ning
Pages 39-51
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- Patrick Dewilde, Zhen-Qui Ning
Pages 53-70
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- Patrick Dewilde, Zhen-Qui Ning
Pages 71-95
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- Patrick Dewilde, Zhen-Qui Ning
Pages 97-105
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- Patrick Dewilde, Zhen-Qui Ning
Pages 107-136
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- Patrick Dewilde, Zhen-Qui Ning
Pages 137-146
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- Patrick Dewilde, Zhen-Qui Ning
Pages 147-156
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- Patrick Dewilde, Zhen-Qui Ning
Pages 157-167
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- Patrick Dewilde, Zhen-Qui Ning
Pages 169-184
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- Patrick Dewilde, Zhen-Qui Ning
Pages 185-196
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- Patrick Dewilde, Zhen-Qui Ning
Pages 197-214
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Back Matter
Pages 215-219
About this book
A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by factors of four in overall complexity -requires a substantial increase in density from the current technology, added precision, a decrease of the size of geometric features, and an increase in the total usable surface. The microelectronic industry has set the trend. Ultra large funds have been invested in the construction of new plants to produce the ultra large-scale circuits with utmost precision under the most severe conditions. The decrease in feature size to submicrons -0.7 micron is quickly becoming availabl- does not only bring technological problems. New design problems arise as well. The elements from which microelectronic circuits are build, transistors and interconnects, have different shape and behave differently than before. Phenomena that could be neglected in a four micron technology, such as the non-uniformity of the doping profile in a transistor, or the mutual capacitance between two wires, now play an important role in circuit design. This situation does not make the life of the electronic designer easier: he has to take many more parasitic effects into account, up to the point that his ideal design will not function as originally planned.
