Skip to main content
SpringerLink
Log in

Logic Synthesis Using Synopsys®

  • Book
  • © 1997

Overview

Authors:
  1. Pran Kurup

    1. Cirrus Logic, Inc., USA

    View author publications

    You can also search for this author in PubMed   Google Scholar

  2. Taher Abbasi

    1. Synopsys, Inc., USA

    View author publications

    You can also search for this author in PubMed   Google Scholar

This is a preview of subscription content, log in via an institution to check access.

Access this book

Log in via an institution
eBook USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (11 chapters)

  1. Front Matter

    Pages i-xxi
    Download chapter PDF

  2. High-Level Design Methodology Overview

    • Pran Kurup, Taher Abbasi
    Pages 1-32

  3. VHDL/Verilog Coding for Synthesis

    • Pran Kurup, Taher Abbasi
    Pages 33-74

  4. Pre and Post-Synthesis Simulation

    • Pran Kurup, Taher Abbasi
    Pages 75-95

  5. Constraining and Optimizing Designs — I

    • Pran Kurup, Taher Abbasi
    Pages 97-137

  6. Constraining and Optimizing Designs — II

    • Pran Kurup, Taher Abbasi
    Pages 139-173

  7. Links to Layout

    • Pran Kurup, Taher Abbasi
    Pages 175-196

  8. FPGA Synthesis

    • Pran Kurup, Taher Abbasi
    Pages 197-207

  9. Design for Testability

    • Pran Kurup, Taher Abbasi
    Pages 209-243

  10. Interfacing Between CAD Tools

    • Pran Kurup, Taher Abbasi
    Pages 245-262

  11. Design Re-use Using DesignWare

    • Pran Kurup, Taher Abbasi
    Pages 263-282

  12. Behavioral Synthesis — An Introduction

    • Pran Kurup, Taher Abbasi
    Pages 283-299

  13. Back Matter

    Pages 301-322
    Download chapter PDF
Back to top

Keywords

About this book

Logic Synthesis Using Synopsys®, Second Edition is for anyone who hates reading manuals but would still like to learn logic synthesis as practised in the real world. Synopsys Design Compiler, the leading synthesis tool in the EDA marketplace, is the primary focus of the book. The contents of this book are specially organized to assist designers accustomed to schematic capture-based design to develop the required expertise to effectively use the Synopsys Design Compiler. Over 100 `Classic Scenarios' faced by designers when using the Design Compiler have been captured, discussed and solutions provided. These scenarios are based on both personal experiences and actual user queries. A general understanding of the problem-solving techniques provided should help the reader debug similar and more complicated problems. In addition, several examples and dc_shell scripts (Design Compiler scripts) have also been provided.
Logic Synthesis Using Synopsys®, Second Edition is an updated and revised version of the very successful first edition.
The second edition covers several new and emerging areas, in addition to improvements in the presentation and contents in all chapters from the first edition. With the rapid shrinking of process geometries it is becoming increasingly important that `physical' phenomenon like clusters and wire loads be considered during the synthesis phase. The increasing demand for FPGAs has warranted a greater focus on FPGA synthesis tools and methodology. Finally, behavioral synthesis, the move to designing at a higher level of abstraction than RTL, is fast becoming a reality. These factors have resulted in the inclusion of separate chapters in the second edition to cover Links to Layout, FPGA Synthesis and Behavioral Synthesis, respectively. Logic Synthesis Using Synopsys®, Second Edition has beenwritten with the CAD engineer in mind. A clear understanding of the synthesis tool concepts, its capabilities and the related CAD issues will help the CAD engineer formulate an effective synthesis-based ASIC design methodology. The intent is also to assist design teams to better incorporate and effectively integrate synthesis with their existing in-house design methodology and CAD tools.

Authors and Affiliations

  • Cirrus Logic, Inc., USA

    Pran Kurup

  • Synopsys, Inc., USA

    Taher Abbasi

Bibliographic Information

  • Book Title: Logic Synthesis Using Synopsys®

  • Authors: Pran Kurup, Taher Abbasi

  • DOI: https://doi.org/10.1007/978-1-4613-1455-4

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Kluwer Academic Publishers 1997

  • Hardcover ISBN: 978-0-7923-9786-1Published: 31 October 1996

  • Softcover ISBN: 978-1-4612-8634-9Published: 18 October 2011

  • eBook ISBN: 978-1-4613-1455-4Published: 06 December 2012

  • Edition Number: 2

  • Number of Pages: XXII, 322

  • Topics: Circuits and Systems, Electrical Engineering, Computer-Aided Engineering (CAD, CAE) and Design

Publish with us

Policies and ethics

Back to top

Search

Navigation