The Simple Art of SoC Design

1. Front Matter

   Pages i-xvii

   PDF

2. The Third Revolution

   • Michael Keating

   Pages 1-13

3. Simplifying RTL Design

   • Michael Keating

   Pages 15-26

4. Reducing Complexity in Control-Dominated Designs

   • Michael Keating

   Pages 27-45

5. Hierarchical State Machines

   • Michael Keating

   Pages 47-54

6. Measuring and Minimizing State Space

   • Michael Keating

   Pages 55-69

7. Verification

   • Michael Keating

   Pages 71-87

8. Reducing Complexity in Data Path Dominated Designs

   • Michael Keating

   Pages 89-107

9. Simplifying Interfaces

   • Michael Keating

   Pages 109-121

10. Complexity at the Chip Level

    • Michael Keating

    Pages 123-137

11. Raising Abstraction Above RTL

    • Michael Keating

    Pages 139-153

12. SystemVerilog Extensions

    • Michael Keating

    Pages 155-170

13. The Future of Design

    • Michael Keating

    Pages 171-180

14. Back Matter

    Pages 181-234

    PDF

This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow’s SoC designs.

• Circuits and Systems
• Embedded Systems
• High-Level Synthesis
• System Level Verification
• System on Chip

• Synopsys, Palo Alto, USA

  Michael Keating

Mike Keating is a Synopsys Fellow. Over the last 12 years, he has been with Synopsys focusing on IP development methodology, hardware and software design quality and low power design. His current research focuses on high level design and the challenges of designing extremely complex systems. Mike received his BSEE and MSEE from Stanford University, and has over 25 years experience in ASIC and system design. He is co-author of the Reuse Methodology Manual and the Low Power Methodology Manual. In 2007, ISQED gave Mike the Quality Award for contributions to quality in electronic design.

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