Overview
- Describes trends towards distributed memory architectures and distributed power management Integrates Network on Chip with distributed, shared memory architectures
- Demonstrates novel design methodologies and frameworks for multi-core design space exploration
- Shows how midlleware services (dynamic data management) can be integrated into and support by the platform
- Includes supplementary material: sn.pub/extras
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Table of contents (8 chapters)
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HW/SW/ Building Blocks: Architecture, Methods, and Techniques
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System-level Exploration
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Industrial Applications
Keywords
About this book
Reviews
From the reviews:
“This book presents to the general public the most important results from the Mapping Optimization for Scalable Multi-core Architecture (MOSART) research project, which was carried out between 2008 and 2010 (three years). It is quite brief and organized into three parts. … this book is well organized and balanced. Each chapter is self-explanatory and can be studied separately. The book as a whole is a good demonstration of engineering. It deserves to be recommended to professionals and research students in the area.” (D. Grigoras, ACM Computing Reviews, June, 2012)
Editors and Affiliations
Bibliographic Information
Book Title: Scalable Multi-core Architectures
Book Subtitle: Design Methodologies and Tools
Editors: Dimitrios Soudris, Axel Jantsch
DOI: https://doi.org/10.1007/978-1-4419-6778-7
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science + Business Media, LLC 2012
Hardcover ISBN: 978-1-4419-6777-0
Softcover ISBN: 978-1-4899-9315-1
eBook ISBN: 978-1-4419-6778-7
Edition Number: 1
Number of Pages: XIV, 223
Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design