The MIPS-X RISC Microprocessor

1. Front Matter

   Pages i-xxiv

   PDF

2. Introduction

   • Paul Chow

   Pages 1-5

3. Architecture

   • Paul Chow

   Pages 7-19

4. The Compiler System

   • Paul Chow

   Pages 21-32

5. A Hardware Overview

   • Paul Chow

   Pages 33-48

6. The Execute Engine

   • Paul Chow

   Pages 49-92

7. Instruction Fetch Hardware

   • Paul Chow

   Pages 93-160

8. The External Interface

   • Paul Chow

   Pages 161-192

9. Back Matter

   Pages 193-231

   PDF

The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and complete word on MIPS-X. The initial design of MIPS-X was formulated in 1984 beginning in the Spring. At that time, we were unsure that RISe technology was going to have the industrial impact that we felt it should. We also knew of a number of architectural and implementation flaws in the Stanford MIPS machine. We believed that a new processor could achieve a performance level of over 10 times a VAX 11/780, and that a microprocessor of this performance level would convince academic skeptics of the value of the RISe approach. We were concerned that the flaws in the original RISe design might overshadow the core ideas, or that attempts to industrialize the technology would repeat the mistakes of the first generation designs. MIPS-X was targeted to eliminate the flaws in the first generation de­ signs and to boost the performance level by over a factor of five.

• Hardware
• design
• microprocessor
• processor

• University of Toronto, Canada

  Paul Chow

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