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Analysis and Design of Resilient VLSI Circuits

Mitigating Soft Errors and Process Variations

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  • © 2010

Overview

Authors:
  1. Rajesh Garg

    1. Hillsboro, U.S.A.

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  2. Sunil P. Khatri

    1. Dept. Electrical & Computer Engineering, Texas A & M University, College Station, U.S.A.

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  • Describes the state of the art in the areas of radiation tolerance circuit design and process variation tolerant circuit design
  • Presents analytical approaches to test efficiently the severity of electrical effects of radiation/process variations, as well as techniques to minimize the effects due to these two problems
  • Distills content oriented toward nuclear engineers into leading-edge algorithms and techniques that can be understood easily and applied by VLSI designers
  • Includes supplementary material: sn.pub/extras

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Table of contents (11 chapters)

  1. Front Matter

    Pages 1-18
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  2. Introduction

    • Rajesh Garg, Sunil P. Khatri
    Pages 1-17

  4. Process Variations

    1. Front Matter

      Pages 130-130
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    2. Sensitizable Statistical Timing Analysis

      • Rajesh Garg, Sunil P. Khatri
      Pages 131-151

    3. A Variation Tolerant Combinational Circuit Design Approach Using Parallel Gates

      • Rajesh Garg, Sunil P. Khatri
      Pages 153-171

    4. Process Variation Tolerant Single-supply True Voltage Level Shifter

      • Rajesh Garg, Sunil P. Khatri
      Pages 173-188

    5. Conclusions and Future Directions

      • Rajesh Garg, Sunil P. Khatri
      Pages 189-193

  5. Back Matter

    Pages 1-17
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Keywords

About this book

This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.

Authors and Affiliations

  • Hillsboro, U.S.A.

    Rajesh Garg

  • Dept. Electrical & Computer Engineering, Texas A & M University, College Station, U.S.A.

    Sunil P. Khatri

Bibliographic Information

  • Book Title: Analysis and Design of Resilient VLSI Circuits

  • Book Subtitle: Mitigating Soft Errors and Process Variations

  • Authors: Rajesh Garg, Sunil P. Khatri

  • DOI: https://doi.org/10.1007/978-1-4419-0931-2

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer-Verlag US 2010

  • Hardcover ISBN: 978-1-4419-0930-5Published: 16 November 2009

  • Softcover ISBN: 978-1-4899-8510-1Published: 28 November 2014

  • eBook ISBN: 978-1-4419-0931-2Published: 22 October 2009

  • Edition Number: 1

  • Number of Pages: XXII, 212

  • Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design

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