Planar Double-Gate Transistor

1. Front Matter

   Pages i-viii

   PDF

2. Introduction

   Pages 1-2

3. Multiple Gate Technologies

   • Thierry Poiroux, Maud Vinet, Simon Deleonibus

   Pages 3-25

4. Compact Modeling of Independent Double-Gate MOSFET: A Physical Approach

   • Daniela Munteanu, Jean-Luc Autran

   Pages 27-54

5. Compact Modeling of Double Gate MOSFET for IC Design

   • Marina Reyboz, Olivier Rozeau, Thierry Poiroux

   Pages 55-88

6. Low Frequency Noise in Double-Gate SOI CMOS Devices

   • Jalal Jomaah, Gérard Ghibaudo

   Pages 89-104

7. Analog Circuit Design

   • Philippe Freitas, David Navarro, Ian O'Connor, Gerard Billiot, Hervé Lapuyade, Jean-Baptiste Begueret

   Pages 105-136

8. Logic Circuit Design with DGMOS Devices

   • Ian O'Connor, Ilham Hassoune, Xi Yang, David Navarro

   Pages 137-165

9. SRAM Circuit Design

   • Bastien Giraud, Olivier Thomas, Amara Amara, Andrei Vladimirescu, Marc Belleville

   Pages 167-203

10. Back Matter

    Pages 205-211

    PDF

Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore’s Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore’s law and each dif?culty has found a solution.

• CMOS
• Circuit Design
• Compact modelling
• Double-Gate MOSFET
• Fully Depleted Silicon On Insulator
• Leistungsfeldeffekttransistor
• analog circuit design
• analog design
• digital design
• field-effect transistor
• integrated circuit
• metal oxide semiconductur f

• Institut Supérieur d'Electronique de Paris (ISEP), Paris, France

  Amara Amara

• CEA, LETI-MINATEC, France

  Olivier Rozeau

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