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VLSI-SoC: Research Trends in VLSI and Systems on Chip

Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France

  • Conference proceedings
  • © 2008

Overview

Editors:
  1. Giovanni Micheli

    1. Ecole Polytechnique Fédérale de Lausanne, Switzerland

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  2. Salvador Mir

    1. Institut National Polytechnique de Grenoble, France

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  3. Ricardo Reis

    1. Universidade Federal do Rio Grande do Sul, Brazil

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  • Most recent volume from the VLSI
  • C Conference Series”

Part of the book series: IFIP Advances in Information and Communication Technology (IFIPAICT, volume 249)

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Table of contents (21 papers)

  1. Front Matter

    Pages i-x
    Download chapter PDF

  2. Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits

    • Sam Kavusi, Kunal Ghosh, Abbas El Gamal
    Pages 1-23

  3. Oversampled Time Estimation Techniques for Precision Photonic Detectors

    • Robert Henderson, Bruce Rae, David Renshaw, Edoardo Charbon
    Pages 25-35

  4. Innovative Optoeletronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices

    • C. Guiducci, C. Stagni, M. Brocchi, M. Lanzoni, B. Riccò, A. Nascetti et al.
    Pages 37-53

  5. Electronic Detection of DNA Adsorption and Hybridization

    • Ulrich Bockelmann
    Pages 55-67

  6. Probabilistic amp; Statistical Design—the Wave of the Future

    • Shekhar Borkar
    Pages 69-79

  7. A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs

    • Shan Jiang, Manh Anh Do, Kiat Seng Yeo
    Pages 81-99

  8. Probabilistic Design: A Survey of Probabilistic CMOS Technology and Future Directions for Terascale IC Design

    • Lakshmi N. B. Chakrapani, Jason George, Bo Marr, Bilge E. S. Akgul, Krishna V. Palem
    Pages 101-118

  9. Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design

    • Antonis Papanikolaou, Hua Wang, Miguel Miranda, Francky Catthoor, Wim Dehaene
    Pages 119-141

  10. Soft Error Resilient System Design through Error Correction

    • Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim
    Pages 143-156

  11. Library Compatible Variational Delay Computation

    • Luis Guerra e Silva, Zhenhai Zhu, Joel R. Phillips, L. Miguel Silveira
    Pages 157-176

  12. A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures

    • Giovanni Beltrame, Donatella Sciuto, Christina Silvano
    Pages 177-196

  13. Frequency and Speed Setting for Energy Conservation in Autonomous Mobile Robots

    • Jeff Brateman, Changjiu Xian, Yung-Hsiang Lu
    Pages 197-216

  14. Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation

    • Zeynep Toprak Deniz, Yusuf Leblebici, Eric Vittoz
    Pages 217-240

  15. Logic Synthesis of EXOR Projected Sum of Products

    • Anna Bernasconi, Valentina Ciriani, Roberto Cordone
    Pages 241-257

  16. A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits

    • Renato Hentschke, Sandro Sawicki, Marcelo Johann, Ricardo Reis
    Pages 259-279

  17. CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization

    • Ahcàne Bounceur, Salvador Mir, Luis Rolindez, Emmanuel Simeu
    Pages 281-300

  18. Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation

    • Tsuyoshi Iwagaki, Satoshi Ohtake, Hideo Fujiwara
    Pages 301-316

  19. Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies

    • Arno Moonen, Chris Bartels, Marco Bekooij, René van den Berg, Harpreet Bhullar, Kees Goossens et al.
    Pages 317-336

  20. Designing Routing and Message-Dependent Deadlock Free Networks on Chips

    • Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini et al.
    Pages 337-355
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Keywords

About this book

This book contains extended and revised versions of the best papers that were presented during the fourteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference. The 14th conference was held at the Hotel Boscolo, Nice, France (October 16-18, 2006). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier, Darmstadt and Perth. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5 and by the IEEE Council on Electronic Design Automation (CEDA), is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI- SOC conferences aim to address these exciting new issues.

Editors and Affiliations

  • Ecole Polytechnique Fédérale de Lausanne, Switzerland

    Giovanni Micheli

  • Institut National Polytechnique de Grenoble, France

    Salvador Mir

  • Universidade Federal do Rio Grande do Sul, Brazil

    Ricardo Reis

Bibliographic Information

  • Book Title: VLSI-SoC: Research Trends in VLSI and Systems on Chip

  • Book Subtitle: Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France

  • Editors: Giovanni Micheli, Salvador Mir, Ricardo Reis

  • Series Title: IFIP Advances in Information and Communication Technology

  • DOI: https://doi.org/10.1007/978-0-387-74909-9

  • Publisher: Springer New York, NY

  • eBook Packages: Computer Science, Computer Science (R0)

  • Copyright Information: IFIP International Federation for Information Processing 2008

  • Hardcover ISBN: 978-0-387-74908-2Published: 15 November 2007

  • Softcover ISBN: 978-1-4419-4517-4Published: 23 November 2010

  • eBook ISBN: 978-0-387-74909-9Published: 23 August 2010

  • Series ISSN: 1868-4238

  • Series E-ISSN: 1868-422X

  • Edition Number: 1

  • Number of Pages: X, 394

  • Topics: Computer Communication Networks, Processor Architectures

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