Overview
- Presents a comprehensive methodology for efficient implementation of cryptographic algorithms on reconfigurable hardware devices
- Special emphasis on the practical aspects of reconfigurable hardware design and a comprehensive description of state-of-the-art implementation techniques
- Demonstrates how high-speed cryptographic algorithm implementations can be achieved on reconfigurable hardware devices without posing prohibitive requirements on hardware resources
- Includes supplementary material: sn.pub/extras
Part of the book series: Signals and Communication Technology (SCT)
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Table of contents (10 chapters)
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Front Matter
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Back Matter
Keywords
About this book
Cryptographic solutions using software methods can be used for those security applications where data traffic is not too large and low encryption rate is tolerable. On the other hand, hardware methods offer high-speed solutions making them highly suitable for applications where data traffic is fast and large data is required to be encrypted in real time. VLSI (also known as ASIC), and FPGAs (Field Programmable Gate Arrays) are two alternatives for implementing cryptographic algorithms in hardware. FPGAs offer several benefits for cryptographic algorithm implementations over VLSI as they offer high flexibility. Due to its reconfigurable property, keys can be changed rapidly. Moreover, basic primitives in most cryptographic algorithms can efficiently be implemented in FPGAs.
Since the invention of the Data Encryption Standard (DES), some 40 years ago, a considerable amount of cryptographic algorithm implementation literature has been produced both, for software and hardware platforms. Unfortunately, virtually there exists no book explaining how the main cryptographic algorithms can be implemented on reconfigurable hardware devices.
This book will cover the study of computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The concepts and techniques to be reviewed in this book will make special emphasis on the practical aspects of reconfigurable hardware design, explaining the basic mathematics related and giving a comprehensive description of state-of-the-art implementation techniques. Thus, the main goal of this monograph is to show how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices without posing prohibited high requirements for hardware resources.
Authors and Affiliations
Bibliographic Information
Book Title: Cryptographic Algorithms on Reconfigurable Hardware
Authors: Francisco Rodríguez-Henríquez, Arturo Díaz Pérez, Nazar Abbas Saqib, Çetin Kaya Koç
Series Title: Signals and Communication Technology
DOI: https://doi.org/10.1007/978-0-387-36682-1
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer-Verlag US 2007
Hardcover ISBN: 978-0-387-33883-5Published: 14 November 2006
Softcover ISBN: 978-1-4419-4156-5Published: 29 November 2010
eBook ISBN: 978-0-387-36682-1Published: 03 April 2007
Series ISSN: 1860-4862
Series E-ISSN: 1860-4870
Edition Number: 1
Number of Pages: XXVI, 362
Topics: Electrical Engineering, Computer Engineering, Computer Communication Networks, Communications Engineering, Networks, Data Structures and Information Theory, Circuits and Systems