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Closing the Gap Between ASIC & Custom

Tools and Techniques for High-Performance ASIC Design

  • Book
  • © 2002

Overview

Authors:
  1. David Chinnery

    1. University of California, Berkeley

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  2. Kurt Keutzer

    1. University of California, Berkeley

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Table of contents (17 chapters)

  1. Front Matter

    Pages i-xv
    Download chapter PDF

  2. Introduction and Overview of the Book

    • David Chinnery, Kurt Keutzer
    Pages 1-31

  3. Contributing Factors

    1. Improving Performance through Microarchitecture

      • David Chinnery, Kurt Keutzer
      Pages 33-56

    2. Reducing the Timing Overhead

      • David Chinnery, Kurt Keutzer
      Pages 57-100

    3. High-Speed Logic, Circuits, Libraries and Layout

      • Andrew Chang, William J. Dally, David Chinnery, Kurt Keutzer, Radu Zlatanovici
      Pages 101-144

    4. Finding Peak Performance in a Process

      • David Chinnery, Kurt Keutzer
      Pages 145-168

  4. Design Techniques

    1. Physical Prototyping Plans for High Performance

      • Michel Courtoy, Pinhong Chen, Xiaoping Tang, Chin-Chi Teng, Yuji Kukimoto
      Pages 169-186

    2. Automatic Replacement of Flip-Flops by Latches in ASICs

      • David Chinnery, Kurt Keutzer, Jagesh Sanghavi, Earl Killian, Kaushik Sheth
      Pages 187-208

    3. Useful-Skew Clock Synthesis Boosts ASIC Performance

      • Wayne Dai, David Staepelaere
      Pages 209-223

    4. Faster and Lower Power Cell-Based Designs with Transistor-Level Cell Sizing

      • Michel Côté, Philippe Hurat
      Pages 225-240

    5. Design Optimization with Automated Flex-Cell Creation

      • Debashis Bhattacharya, Vamsi Boppana
      Pages 241-267

    6. Exploiting Structure and Managing Wires to Increase Density and Performance

      • Andrew Chang, William J. Dally
      Pages 269-287

    7. Semi-Custom Methods in a High-Performance Microprocessor Design

      • Gregory A. Northrop
      Pages 289-303

    8. Controlling Uncertainty in High Frequency Designs

      • Stephen E. Rich, Matthew J. Parker, Jim Schwartz
      Pages 305-322

    9. Increasing Circuit Performance through Statistical Design Techniques

      • Michael Orshansky
      Pages 323-344

  5. Design Examples

    1. Achieving 550MHz in a Standard Cell ASIC Methodology

      • David Chinnery, Borivoje Nikolić, Kurt Keutzer
      Pages 345-360

    2. The iCORE™ 520MHz Synthesizable CPU Core

      • Nick Richardson, Lun Bin Huang, Razak Hossain, Julian Lewis, Tommy Zounes, Naresh Soni
      Pages 361-381

    3. Creating Synthesizable ARM Processors with Near Custom Performance

      • David Flynn, Michael Keating
      Pages 383-408

  6. Back Matter

    Pages 411-414
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Keywords

About this book

by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy’s comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms.

Reviews

From the reviews:
"This book unveils the mystery behind the performance gap between ASIC and Custom design and shows how to close the gap with minimal design effort. A must read for every ASIC or ASSP designer."
(William J. Dally, Professor, Stanford University)
"Most IP core providers must provide high-performance designs within the constraints of an ASIC methodology. I'm optimistic that careful application of the techniques in this book will enable me to design embedded processors that do indeed close `the Gap Between ASIC and Custom'."
(Kees Vissers, Director of Architecture, Trimedia Technologies Inc.)
"This book provides a comprehensive explanation of why ASICs fall so far behind custom ICs in performance, and then shows how better tools, libraries and methodologies can narrow the gap. It's a must read for ASIC designers who want to boost performance - or custom designers who want to speed time to market with ASIC-like design methodologies."
(Richard Goering, EDA Editorial Director, EE Times)
"I've heard there is a price on the authors' heads. Power Users don't like people who give away their secrets."
(Gary Smith, Chief Analyst, Dataquest)
"This book reflects the best research to date on understanding the tradeoffs between full-custom intellectual property blocks and synthesized intellectual-property blocks - a topic we could only touch on in the Reuse Methodology Manual. It is required reading for anyone engaged in system-on-a-chip design."
(Michael Keating, author of the Reuse Methodology Manual, Vice-President, Synopsys)
"Solves one of life's little mysteries[...] It looks like it should become required reading for the IC innovators of this millennium."
(Neil Weste, author of Principles of CMOS VLSI Design, Cisco Systems, Inc.)

Authors and Affiliations

  • University of California, Berkeley

    David Chinnery, Kurt Keutzer

Bibliographic Information

  • Book Title: Closing the Gap Between ASIC & Custom

  • Book Subtitle: Tools and Techniques for High-Performance ASIC Design

  • Authors: David Chinnery, Kurt Keutzer

  • DOI: https://doi.org/10.1007/b105287

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer Science+Business Media New York 2002

  • Hardcover ISBN: 978-1-4020-7113-3Published: 30 June 2002

  • Softcover ISBN: 978-1-4757-7624-9Published: 19 March 2013

  • eBook ISBN: 978-0-306-47823-9Published: 08 May 2007

  • Edition Number: 1

  • Number of Pages: XV, 414

  • Topics: Circuits and Systems, Electrical Engineering, Computer-Aided Engineering (CAD, CAE) and Design

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