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Architecture Exploration of FPGA Based Accelerators for BioInformatics Applications

  • Book
  • © 2016

Overview

Authors:
  1. B. Sharat Chandra Varma

    1. Elect&Elctro Engg,Chow Yei Ching Bldg, The University of Hong Kong, Hong Kong, Hong Kong

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  2. Kolin Paul

    1. Computer Science & Engineering, Indian Institute of Technology Delhi, Delhi, India

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  3. M. Balakrishnan

    1. Computer Science and Engineering, Indian Institute of Technology Delhi, New Delhi, India

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  • Offers techniques to carry out design space exploration of FPGA based accelerators
  • Presents a methodology to study benefits of HEBs in FPGAs in the context of application acceleration
  • Shows FPGA based acceleration of two important bioinformatics applications
  • Includes supplementary material: sn.pub/extras

Part of the book series: Springer Series in Advanced Microelectronics (MICROELECTR., volume 55)

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-xv
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  2. Introduction

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 1-8

  3. Related Work

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 9-28

  4. Methodology for Implementing Accelerators

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 29-38

  5. FPGA-Based Acceleration of Protein Docking

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 39-54

  6. FPGA-Based Acceleration of De Novo Genome Assembly

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 55-79

  7. Design of Accelerators with Hard Embedded Blocks

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 81-99

  8. System-Level Design Space Exploration

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 101-116

  9. Future Directions

    • B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
    Pages 117-120

  10. Back Matter

    Pages 121-122
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Keywords

About this book

This book presents an evaluation methodology to design future FPGA fabrics incorporating hard embedded blocks (HEBs) to accelerate applications. This methodology will be useful for selection of blocks to be embedded into the fabric and for evaluating the performance gain that can be achieved by such an embedding. The authors illustrate the use of their methodology by studying the impact of HEBs on two important bioinformatics applications: protein docking and genome assembly. The book also explains how the respective HEBs are designed and how hardware implementation of the application is done using these HEBs. It shows that significant speedups can be achieved over pure software implementations by using such FPGA-based accelerators. The methodology presented in this book may also be used for designing HEBs for accelerating software implementations in other domains besides bioinformatics. This book will prove useful to students, researchers, and practicing engineers alike.

Authors and Affiliations

  • Elect&Elctro Engg,Chow Yei Ching Bldg, The University of Hong Kong, Hong Kong, Hong Kong

    B. Sharat Chandra Varma

  • Computer Science & Engineering, Indian Institute of Technology Delhi, Delhi, India

    Kolin Paul

  • Computer Science and Engineering, Indian Institute of Technology Delhi, New Delhi, India

    M. Balakrishnan

About the authors

B. Sharat Chandra Varma is Research Associate in the Department of Electrical & Electronic Engineering at The University of Hong Kong, Hong Kong. He obtained his PhD from IIT Delhi, New Delhi. He completed his B.E. (2003) from Visvesvaraya Technological University Karnataka and MSc. (2007) from Manipal University, Karnataka. His research interest areas are re-configurable computing, FPGA, hardware-software co-design, hardware accelerators, and computer architecture. Dr. Varma has over 10 years of research and industrial experience and has several journal publications to his credit.

Kolin Paul is presently Associate Professor with the department of Computer Science and Engineering at Indian Institute of Technology Delhi, New Delhi. His academic degrees include M.Sc. (1995) from Jadavpur University and Ph.D. (2002) from Bengal Engineering College, Calcutta, India. Dr. Paul has several papers published in refereed journal and conference proceedings.

M. Balakrishnan isa Professor in the CSE Department at IIT Delhi, New Delhi, India. He completed his PhD in 1984 from IIT Delhi. He has 16 journal articles, 63 refereed conference publications, one book chapter and two patents to his credit. Dr. Balakrishnan has been a part of many research projects and consultancies from leading EDA/VLSI companies. He is a reviewer for major international journals, a member of key academic bodies. He has supervised 8 PhDs, 3 MS(R) and 78 M.Tech students. His areas of specialization are behavioral and system level synthesis, system level design and modeling, computer architecture, hardware-software co-design, embedded system design, and assistive devices for the visually impaired.

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