Springer Series in Advanced Microelectronics

Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications

Authors: Franco, Jacopo, Kaczer, Ben, Groeseneken, Guido

  • Review of CMOS scaling trends beyond the conventional geometric scaling era, and of advanced NBTI measurement techniques and modeling attempts
  • Complete reliability study of the novel (Si)Ge channel quantum well pMOSFET technology, including extensive experimental datasets collected on a variety of processed 300mm wafers
  • Extensive experimental data are reported
  • The reliability study is extended to nanoscale devices
  • Appeals to researchers and professionals from the multidiscipline fields of Materials Science, Electrical Engineering and Physics
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About this book

Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5Å, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability.

This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated.

The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process - and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack.

The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes.

About the authors

Jacopo Franco received the M.Sc. in Electronic Engineering from Università della Calabria, Italy, in 2008 and the Ph.D. degree in Engineering from the KU Leuven, Belgium, in 2013. He is currently a Researcher in the reliability group of imec, Leuven, Belgium. His research interests focus on the reliability of high-mobility channel transistors for future CMOS nodes and on variability issues in nanoscale devices. He has co-authored more than 70 papers in international journal and conference proceedings and received the Best Student Paper Award at SISC (2009), the EDS Ph.D. Student Fellowship (2012), the EDS Paul Rappaport Award (2011), and the Best Paper Award at IRPS (2012).

Ben Kaczer is a Principal Scientist at imec, Belgium. He received the M.S. degree in Physical Electronics from Charles University, Prague, in 1992 and the M.S. and Ph.D. degrees in Physics from The Ohio State University, in 1996 and 1998, respectively. In 1998 he joined the reliability group of imec. He has co-authored more than 300 papers and received 5 Best or Outstanding IRPS and 1 IPFA Paper Awards. He is currently serving on the IEEE T. Electron Dev. Editorial Board.

Guido Groeseneken received the M.Sc. degree in 1980 and the Ph.D degree in applied sciences in 1986, both from the KU Leuven, Belgium. In 1987 he joined the R&D Laboratory of imec, Leuven, Belgium, where he is responsible for research in reliability physics for deep submicron CMOS technologies and in nanotechnology for post-CMOS applications. Since 2001 he is Professor at the KU Leuven, where he is Program Director of the Master in Nanoscience and Nanotechnology and coordinating a European Erasmus Mundus Master program in Nanoscience and nanotechnology. He became an IEEE Fellow in 2005 and an IMEC Fellow in 2007.

Table of contents (7 chapters)

  • Introduction

    Franco, Jacopo (et al.)

    Pages 1-17

  • Degradation Mechanisms

    Franco, Jacopo (et al.)

    Pages 19-66

  • Techniques and Devices

    Franco, Jacopo (et al.)

    Pages 67-98

  • Negative Bias Temperature Instability in (Si)Ge pMOSFETs

    Franco, Jacopo (et al.)

    Pages 99-129

  • Negative Bias Temperature Instability in Nanoscale Devices

    Franco, Jacopo (et al.)

    Pages 131-160

Buy this book

eBook $99.00
price for USA (gross)
  • ISBN 978-94-007-7663-0
  • Digitally watermarked, DRM-free
  • Included format: PDF, EPUB
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $129.00
price for USA
  • ISBN 978-94-007-7662-3
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $129.00
price for USA
  • ISBN 978-94-024-0205-6
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
  • Rental duration: 1 or 6 month
  • low-cost access
  • online reader with highlighting and note-making option
  • can be used across all devices
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Bibliographic Information

Bibliographic Information
Book Title
Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications
Authors
Series Title
Springer Series in Advanced Microelectronics
Series Volume
47
Copyright
2014
Publisher
Springer Netherlands
Copyright Holder
Springer Science+Business Media Dordrecht
eBook ISBN
978-94-007-7663-0
DOI
10.1007/978-94-007-7663-0
Hardcover ISBN
978-94-007-7662-3
Softcover ISBN
978-94-024-0205-6
Series ISSN
1437-0387
Edition Number
1
Number of Pages
XIX, 187
Number of Illustrations and Tables
219 b/w illustrations
Topics