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Protecting Chips Against Hold Time Violations Due to Variability

Authors: Neuberger, Gustavo, Wirth, Gilson, Reis, Ricardo

  • Presents a statistical analysis of the critical clock skew in several test paths, due to process variability in 130nm and 90nm CMOS technology
  • Studies the consequences of variability in several aspects of circuit design
  • Focuses specifically on the effects of storage elements on circuit design
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  • ISBN 978-94-007-2427-3
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About this book

With the development of Very-Deep Sub-Micron technologies, process variability is becoming increasingly important and is a very important issue in the design of complex circuits. Process variability is the statistical variation of process parameters, meaning that these parameters do not have always the same value, but become a random variable, with a given mean value and standard deviation. This effect can lead to several issues in digital circuit design.

The logical consequence of this parameter variation is that circuit characteristics, as delay and power, also become random variables. Because of the delay variability, not all circuits will now have the same performance, but some will be faster and some slower. However, the slowest circuits may be so slow that they will not be appropriate for sale. On the other hand, the fastest circuits that could be sold for a higher price can be very leaky, and also not very appropriate for sale. A main consequence of power variability is that the power consumption of some circuits will be different than expected, reducing reliability, average life expectancy and warranty of products. Sometimes the circuits will not work at all, due to reasons associated with process variations. At the end, these effects result in lower yield and lower profitability.

To understand these effects, it is necessary to study the consequences of variability in several aspects of circuit design, like logic gates, storage elements, clock distribution, and any other that can be affected by process variations. The main focus of this book will be storage elements.

Table of contents (12 chapters)

Buy this book

eBook $99.00
price for USA (gross)
  • ISBN 978-94-007-2427-3
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $129.00
price for USA
  • ISBN 978-94-007-2426-6
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $129.00
price for USA
  • ISBN 978-94-017-7794-0
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
  • Rental duration: 1 or 6 month
  • low-cost access
  • online reader with highlighting and note-making option
  • can be used across all devices
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Bibliographic Information

Bibliographic Information
Book Title
Protecting Chips Against Hold Time Violations Due to Variability
Authors
Copyright
2014
Publisher
Springer Netherlands
Copyright Holder
Springer Science+Business Media Dordrecht
eBook ISBN
978-94-007-2427-3
DOI
10.1007/978-94-007-2427-3
Hardcover ISBN
978-94-007-2426-6
Softcover ISBN
978-94-017-7794-0
Edition Number
1
Number of Pages
XI, 107
Number of Illustrations and Tables
25 b/w illustrations, 51 illustrations in colour
Topics