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Analog Circuits and Signal Processing

Pipelined ADC Design and Enhancement Techniques

Authors: Ahmed, Imran

  • This book is based on award-winning and practical works published at ISSCC and ESSCIRC. The fact that the ideas discussed in the book have already been vetted by a high-caliber peer review ensures the reader will be getting premium content
  • Discusses many approaches used to enable very lower power consumption, an area of interest for "green" electronics
  • Enables the reader to gain both tutorial and detailed insight into state-of-the-art pipelined ADCs from one source
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eBook $119.00
price for USA (gross)
  • ISBN 978-90-481-8652-5
  • Digitally watermarked, DRM-free
  • Included format: PDF, EPUB
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $199.99
price for USA
  • ISBN 978-90-481-8651-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $159.99
price for USA
  • ISBN 978-94-007-3179-0
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
About this book

Pipelined ADCs have seen phenomenal improvements in performance over the last few years. As such, when designing a pipelined ADC a clear understanding of the design tradeoffs, and state of the art techniques is required to implement today's high performance low power ADCs. Written for both researchers and professionals, Pipelined ADC Design and Enhancement Techniques provides:

i.) A tutorial discussion, for those new to pipelined ADCs, of the basic design and tradeoffs involved in designing a pipelined ADC

ii.) A detailed discussion of four novel silicon tested pipelined ADC topologies geared towards those looking to gain insight into state-of-the-art design in the area. The ADCs detailed include:

- An 11-bit 45MS/s ADC which rapidly digitally calibrates in the background both DAC and gain errors

- A 10-bit ADC with power scalable between 50MS/s (35mW) to 1kS/s (15µW)

- A 10-bit ADC for use in sub-sampled systems with a technique to eliminate the front-end sample-and-hold

- A 10-bit, 50MS/s ADC which uses a capacitive charge pump based approach to enable a very small power consumption of 9.9mW.

Table of contents (10 chapters)

Buy this book

eBook $119.00
price for USA (gross)
  • ISBN 978-90-481-8652-5
  • Digitally watermarked, DRM-free
  • Included format: PDF, EPUB
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $199.99
price for USA
  • ISBN 978-90-481-8651-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $159.99
price for USA
  • ISBN 978-94-007-3179-0
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Pipelined ADC Design and Enhancement Techniques
Authors
Series Title
Analog Circuits and Signal Processing
Copyright
2010
Publisher
Springer Netherlands
Copyright Holder
Springer Science+Business Media B.V.
eBook ISBN
978-90-481-8652-5
DOI
10.1007/978-90-481-8652-5
Hardcover ISBN
978-90-481-8651-8
Softcover ISBN
978-94-007-3179-0
Series ISSN
1872-082X
Edition Number
1
Number of Pages
XXV, 200
Topics