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  • Conference proceedings
  • © 1985

Computer Architectures for Spatially Distributed Data

Part of the book series: NATO ASI Subseries F: (NATO ASI F, volume 18)

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Table of contents (21 papers)

  1. Front Matter

    Pages I-VIII
  2. The PASM System and Parallel Image Processing

    • Howard Jay Siegel
    Pages 95-119
  3. The Conversion Via Software of a SIMD Processor into a MIMD Processor

    • Adolfo Guzmán, Miguel Gerzso, Kemer B. Norkin, S. Y. Vilenkin
    Pages 121-137
  4. VLSI Multiprocessor for Image Processing

    • K. S. Fu, K. Hwang, B. W. Wah
    Pages 139-157
  5. Disparity Based Scene Analysis

    • J. L. Potter
    Pages 203-221
  6. Pyramid Architectures for Image Analysis

    • Azriel Rosenfeld
    Pages 223-228
  7. Using Quadtrees to Represent Spatial Data

    • Hanan Samet
    Pages 229-247
  8. Octrees: A Data Structure for Solid-Object Modeling

    • H. Freeman, Donald J. Meagher
    Pages 249-259
  9. Efficient Storage of Quadtrees and Octrees

    • Markku Tamminen
    Pages 261-278

About this book

These are the proceedings of a NATO Advanced Study Institute (ASI) held in Cetraro, Italy during 6-17 June 1983. The title of the ASI was Computer Arehiteetures for SpatiaZZy vistributed Vata, and it brouqht together some 60 participants from Europe and America. Presented ~ere are 21 of the lectures that were delivered. The articles cover a wide spectrum of topics related to computer architecture s specially oriented toward the fast processing of spatial data, and represent an excellent review of the state-of-the-art of this topic. For more than 20 years now researchers in pattern recognition, image processing, meteorology, remote sensing, and computer engineering have been looking toward new forms of computer architectures to speed the processing of data from two- and three-dimensional processes. The work can be said to have commenced with the landmark article by Steve Unger in 1958, and it received a strong forward push with the development of the ILIAC III and IV computers at the University of Illinois during the 1960's. One clear obstacle faced by the computer designers in those days was the limitation of the state-of-the-art of hardware, when the only switching devices available to them were discrete transistors. As aresult parallel processing was generally considered to be imprae­ tieal, and relatively little progress was made.

Editors and Affiliations

  • Rutgers University, New Brunswick, USA

    Herbert Freeman

  • University of Houston, Houston, USA

    Goffredo G. Pieroni

Bibliographic Information

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access