Transactions on High-Performance Embedded Architectures and Compilers

Transactions on High-Performance Embedded Architectures and Compilers II

Editors: Stenström, Per, Whalley, David (Eds.)

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About this book

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems.

This second issue contains 15 papers carefully reviewed and selected out of 31 submissions and is divided into two sections. The first section contains extended versions of the top five papers from the 2nd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2007) held in Ghent, Belgium, in January 2007.  The second section consists of ten papers covering topics such as microarchitecture, memory systems, code generation, and performance modeling.

Table of contents (16 chapters)

  • Introduction

    Stenström, Per (et al.)

    Pages 3-3

  • Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches

    Keramidas, Georgios (et al.)

    Pages 4-22

  • Compiler-Assisted Memory Encryption for Embedded Processors

    Nagarajan, Vijay (et al.)

    Pages 23-44

  • Branch Predictor Warmup for Sampled Simulation through Branch History Matching

    Kluyskens, Simon (et al.)

    Pages 45-64

  • Data Cache Techniques to Save Power and Deliver High Performance in Embedded Systems

    Bhadauria, Major (et al.)

    Pages 65-84

Buy this book

eBook $79.99
price for USA (gross)
  • ISBN 978-3-642-00904-4
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Softcover $109.00
price for USA
  • ISBN 978-3-642-00903-7
  • Free shipping for individuals worldwide
  • Online orders shipping within 2-3 days.
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Bibliographic Information

Bibliographic Information
Book Title
Transactions on High-Performance Embedded Architectures and Compilers II
Editors
  • Per Stenström
  • David Whalley
Series Title
Transactions on High-Performance Embedded Architectures and Compilers
Series Volume
5470
Copyright
2009
Publisher
Springer-Verlag Berlin Heidelberg
Copyright Holder
Springer-Verlag Berlin Heidelberg
eBook ISBN
978-3-642-00904-4
DOI
10.1007/978-3-642-00904-4
Softcover ISBN
978-3-642-00903-7
Series ISSN
1864-306X
Edition Number
1
Number of Pages
XIV, 327
Topics