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Field Programmable Logic and Application

14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings

  • Conference proceedings
  • © 2004

Overview

Editors:
  1. Jürgen Becker

    1. ITIV - Universitaet Karlsruhe (TH),  

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  2. Marco Platzner

    1. University of Paderborn,  

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    You can also search for this editor in PubMed   Google Scholar

  3. Serge Vernalde

    1. IMEC, Leuven, Belgium

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 3203)

Included in the following conference series:

Conference proceedings info: FPL 2004.

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Table of contents (177 papers)

  1. Front Matter

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  2. Plenary Keynotes

    1. FPGAs and the Era of Field Programmability

      • Wim Roelandts
      Pages 1-1

    2. Reconfigurable Systems Emerge

      • Nick Tredennick, Brion Shimamoto
      Pages 2-11

    3. System-Level Design Tools Can Provide Low Cost Solutions in FPGAs: TRUE or FALSE?

      • Mark Dickinson
      Pages 12-12

  3. Organic and Biology Computing

    1. Hardware Accelerated Novel Protein Identification

      • Anish Alex, Jonathan Rose, Ruth Isserlin-Weinberger, Christopher Hogue
      Pages 13-22

    2. Large Scale Protein Sequence Alignment Using FPGA Reprogrammable Logic Devices

      • Stefan Dydel, Piotr Bała
      Pages 23-32

  4. Security and Cryptography 1

    1. A Key Management Architecture for Securing Off-Chip Data Transfers

      • Jonathan Graf, Peter Athanas
      Pages 33-42

    2. FPGA Implementation of Biometric Authentication System Based on Hand Geometry

      • Celia López-Ongil, Raul Sanchez-Reillo, Judith Liu-Jimenez, Fernando Casado, Leslie Sánchez, Luis Entrena
      Pages 43-53

  5. Platform Based Design

    1. SoftSONIC: A Customisable Modular Platform for Video Applications

      • Tero Rissa, Peter Y. K. Cheung, Wayne Luk
      Pages 54-63

    2. Deploying Hardware Platforms for SoC Validation: An Industrial Case Study

      • A. Bigot, F. Charpentier, H. Krupnova, I. Sans
      Pages 64-73

  6. Algorithms and Architectures

    1. Algorithms and Architectures for Use in FPGA Implementations of Identity Based Encryption Schemes

      • Tim Kerins, Emanuel Popovici, William Marnane
      Pages 74-83

    2. Power Analysis Attacks Against FPGA Implementations of the DES

      • François-Xavier Standaert, Sıddıka Berna Örs, Jean-Jacques Quisquater, Bart Preneel
      Pages 84-94

  7. Acceleration Application 1

    1. Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer

      • Maya Gokhale, Janette Frigo, Christine Ahrens, Justin L. Tripp, Ron Minnich
      Pages 95-104

    2. Stochastic Simulation for Biochemical Reactions on FPGA

      • M. Yoshimi, Y. Osana, T. Fukushima, H. Amano
      Pages 105-114

  8. Architecture 1

    1. Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures

      • Alexander Thomas, Juergen Becker
      Pages 115-124

    2. Interconnecting Heterogeneous Nodes in an Adaptive Computing Machine

      • Frederick Furtek, Eugene Hogenauer, James Scheuermann
      Pages 125-134

    3. Improving FPGA Performance and Area Using an Adaptive Logic Module

      • Mike Hutton, Jay Schleicher, David Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu et al.
      Pages 135-144

    4. A Dual-V DD Low Power FPGA Architecture

      • A. Gayasen, K. Lee, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, T. Tuan
      Pages 145-157

  9. Physical Design 1

    1. Simultaneous Timing Driven Clustering and Placement for FPGAs

      • Gang Chen, Jason Cong
      Pages 158-167

    2. Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis

      • Jason Anderson, Sudip Nag, Kamal Chaudhary, Sandor Kalman, Chari Madabhushi, Paul Cheng
      Pages 168-178
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  1. Field Programmable Logic and Application

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Editors and Affiliations

  • ITIV - Universitaet Karlsruhe (TH),  

    Jürgen Becker

  • University of Paderborn,  

    Marco Platzner

  • IMEC, Leuven, Belgium

    Serge Vernalde

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