Authors:
- Maintains a tutorial nature clearly articulating the problems met when implementing a polar decoder, and incrementally develops various novel solutions
- A comprehensive evaluation of software implementation techniques of polar code decoders, targeting modern desktop and embedded processors and general-purpose graphical processing units (GPGPUs)
- A comprehensive evaluation of hardware implementation algorithms and architectures targeting both field-programmable-gate arrays (FPGAs) and application-specific-integrated circuits (ASICs)
- Both the software and hardware implementation evaluations expose the trade-offs in terms of latency, throughput and complexity
- Includes supplementary material: sn.pub/extras
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Table of contents (6 chapters)
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Front Matter
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Back Matter
About this book
A new class of provably capacity achieving error-correction codes, polar codes are suitable for many problems, such as lossless and lossy source coding, problems with side information, multiple access channel, etc.
The first comprehensive book on the implementation of decoders for polar codes, the authors take a tutorial approach to explain the practical decoder implementation challenges and trade-offs in either software or hardware. They also demonstrate new trade-offs in latency, throughput, and complexity in software implementations for high-performance computing and GPGPUs, and hardware implementations using custom processing elements, full-custom application-specific integrated circuits (ASICs), and field-programmable-gate arrays (FPGAs).
Presenting a good overview of this research area and future directions, High-Speed Decoders for Polar Codes is perfect for any researcher or SDR practitioner looking into implementing efficient decoders for polar codes, as well as students and professors in a modern error correction class. As polar codes have been accepted to protect the control channel in the next-generation mobile communication standard (5G) developed by the 3GPP, the audience includes engineers who will have to implement decoders for such codes and hardware engineers designing the backbone of communication networks.Authors and Affiliations
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Institute of Electrical Engineering, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland
Pascal Giard
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Department of Electrical Engineering, École de Technologie Supérieure, Montréal, Canada
Claude Thibeault
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Department of Electrical and Computer Engineering, McGill University, Montréal, Canada
Warren J. Gross
Bibliographic Information
Book Title: High-Speed Decoders for Polar Codes
Authors: Pascal Giard, Claude Thibeault, Warren J. Gross
DOI: https://doi.org/10.1007/978-3-319-59782-9
Publisher: Springer Cham
eBook Packages: Computer Science, Computer Science (R0)
Copyright Information: Springer International Publishing AG 2017
Hardcover ISBN: 978-3-319-59781-2Published: 06 September 2017
Softcover ISBN: 978-3-319-86699-4Published: 12 May 2018
eBook ISBN: 978-3-319-59782-9Published: 30 August 2017
Edition Number: 1
Number of Pages: XVIII, 98
Number of Illustrations: 5 b/w illustrations, 29 illustrations in colour
Topics: Coding and Information Theory, Communications Engineering, Networks, Circuits and Systems, Signal, Image and Speech Processing