Source-Synchronous Networks-On-Chip

Circuit and Architectural Interconnect Modeling

Authors: Mandal, Ayan, Khatri, Sunil P., Mahapatra, Rabi

  • Describes novel methods for high-speed network-on-chip (NoC) design
  • Enables readers to understand NoC design from both circuit and architectural levels
  • Provides circuit-level details of the NoC (including clocking, router design), along with a high-speed, resonant clocking style which is used in the NoC
  • Includes architectural simulations of the NoC, demonstrating significantly superior performance over the state-of-the-art
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eBook $99.00
price for USA (gross)
  • ISBN 978-1-4614-9405-8
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  • Immediate eBook download after purchase
Hardcover $129.00
price for USA
  • ISBN 978-1-4614-9404-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $129.00
price for USA
  • ISBN 978-1-4939-4817-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
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About this book

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

Table of contents (5 chapters)

  • Introduction

    Mandal, Ayan (et al.)

    Pages 1-13

  • Clock Distribution for Fast Networks-on-Chip

    Mandal, Ayan (et al.)

    Pages 15-66

  • Fast Network-on-Chip Design

    Mandal, Ayan (et al.)

    Pages 67-127

  • Fast On-Chip Data Transfer Using Sinusoid Signals

    Mandal, Ayan (et al.)

    Pages 129-137

  • Conclusion and Future Work

    Mandal, Ayan (et al.)

    Pages 139-140

Buy this book

eBook $99.00
price for USA (gross)
  • ISBN 978-1-4614-9405-8
  • Digitally watermarked, DRM-free
  • Included format: PDF, EPUB
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $129.00
price for USA
  • ISBN 978-1-4614-9404-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $129.00
price for USA
  • ISBN 978-1-4939-4817-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
  • Rental duration: 1 or 6 month
  • low-cost access
  • online reader with highlighting and note-making option
  • can be used across all devices
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Bibliographic Information

Bibliographic Information
Book Title
Source-Synchronous Networks-On-Chip
Book Subtitle
Circuit and Architectural Interconnect Modeling
Authors
Copyright
2014
Publisher
Springer-Verlag New York
Copyright Holder
Springer Science+Business Media New York
eBook ISBN
978-1-4614-9405-8
DOI
10.1007/978-1-4614-9405-8
Hardcover ISBN
978-1-4614-9404-1
Softcover ISBN
978-1-4939-4817-8
Edition Number
1
Number of Pages
XIII, 143
Number of Illustrations and Tables
85 b/w illustrations, 10 illustrations in colour
Topics