Constraining Designs for Synthesis and Timing Analysis

A Practical Guide to Synopsys Design Constraints (SDC)

Authors: Gangadharan, Sridhar, Churiwala, Sanjay

  • Provides a hands-on guide to create constraints for synthesis and timing analysis, using Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints
  • Explains fundamental concepts around SDC constraints and its application in a design
  • Explains SDC command syntax, semantics and options
  • Includes key topics of interest to a synthesis, static timing analysis or  place and route engineer
  • Explains which constraints command to use for ease of maintenance and reuse, given several options possible to achieve the same effect on timing
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eBook $89.00
price for USA (gross)
  • ISBN 978-1-4614-3269-2
  • Digitally watermarked, DRM-free
  • Included format: PDF, EPUB
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $119.00
price for USA
  • ISBN 978-1-4614-3268-5
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $119.00
price for USA
  • ISBN 978-1-4899-8916-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
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About this book

This book serves as a hands-on guide to timing constraints in integrated circuit design.  Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly.  Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing.  Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.

About the authors

Sanjay Churiwala is an Electronics Engineer from IIT Kharagpur, with two decades of experience in EDA and VLSI. His interest areas include rule checking, synthesis, simulation, STA, Power and Clock Domain Crossings and Synchronization. He currently works at Hyderabad office of Xilinx.

Sridhar Gangadharan  is a Senior Product Engineering Director for Timing Constraints Analysis and SpyGlass  RTL Analysis Products at Atrenta. He has over 20 years of experience in the electronic design automation industry. His interest areas include RTL verification, timing closure, delay calculation and memory compilers. He holds a Bachelors degree in Computer Science and Engineering from Indian Institute of Technology in Delhi. He is based in San Jose, CA.

Table of contents (17 chapters)

Buy this book

eBook $89.00
price for USA (gross)
  • ISBN 978-1-4614-3269-2
  • Digitally watermarked, DRM-free
  • Included format: PDF, EPUB
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $119.00
price for USA
  • ISBN 978-1-4614-3268-5
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $119.00
price for USA
  • ISBN 978-1-4899-8916-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
  • Rental duration: 1 or 6 month
  • low-cost access
  • online reader with highlighting and note-making option
  • can be used across all devices
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Bibliographic Information

Bibliographic Information
Book Title
Constraining Designs for Synthesis and Timing Analysis
Book Subtitle
A Practical Guide to Synopsys Design Constraints (SDC)
Authors
Copyright
2013
Publisher
Springer-Verlag New York
Copyright Holder
Springer Science+Business Media New York
eBook ISBN
978-1-4614-3269-2
DOI
10.1007/978-1-4614-3269-2
Hardcover ISBN
978-1-4614-3268-5
Softcover ISBN
978-1-4899-8916-1
Edition Number
1
Number of Pages
XXVII, 226
Topics