Reconfigurable Networks-on-Chip

Authors: Chen, S.-J., Ying-Cherng, L., Tsai, W.-C., Hu, Y.-H.

  • Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip
  • Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues
  • Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC
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About this book

This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.

  • Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
  • Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
  • Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. 

From the Foreword:

Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.

--Giovanni De Micheli

Reviews

From the reviews:

“This monograph reviews the fundamental theories, architectures, algorithms, and state-of-the-art development of NoC. The book begins with an overview of the communication-centric design for multi-processor system-on-chip (MP-SoC) and conventional NoC architectures, followed by an extended introduction to the design methodology of NoC. The book concludes with a case study of bidirectional NoC (BiNoC) architecture. … Overall, this monograph provides an in-depth, academic introduction to the design methodology of NoC architecture. … It is suitable for academic researchers and professionals working with NoC.” (Jun Liu, ACM Computing Reviews, July, 2012)


Table of contents (10 chapters)

  • Communication Centric Design

    Chen, Sao-Jie (et al.)

    Pages 3-13

  • Preliminaries

    Chen, Sao-Jie (et al.)

    Pages 15-31

  • Techniques for High Performance Noc Routing

    Chen, Sao-Jie (et al.)

    Pages 35-50

  • Performance-Energy Tradeoffs for Noc Reliability

    Chen, Sao-Jie (et al.)

    Pages 51-67

  • Energy-Aware Task Scheduling for Noc-Based DVS System

    Chen, Sao-Jie (et al.)

    Pages 69-88

Buy this book

eBook $109.00
price for USA (gross)
  • ISBN 978-1-4419-9341-0
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $149.00
price for USA
  • ISBN 978-1-4419-9340-3
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $149.00
price for USA
  • ISBN 978-1-4899-9973-3
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
  • Rental duration: 1 or 6 month
  • low-cost access
  • online reader with highlighting and note-making option
  • can be used across all devices
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Bibliographic Information

Bibliographic Information
Book Title
Reconfigurable Networks-on-Chip
Authors
Copyright
2012
Publisher
Springer-Verlag New York
Copyright Holder
Springer Science+Business Media, LLC
eBook ISBN
978-1-4419-9341-0
DOI
10.1007/978-1-4419-9341-0
Hardcover ISBN
978-1-4419-9340-3
Softcover ISBN
978-1-4899-9973-3
Edition Number
1
Number of Pages
XIV, 206
Topics