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SOC (System-on-a-Chip) Testing for Plug and Play Test Automation

  • Book
  • © 2002

Overview

Editors:
  1. Krishnendu Chakrabarty

    1. Duke University, USA

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Part of the book series: Frontiers in Electronic Testing (FRET, volume 21)

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Table of contents (13 chapters)

  1. Front Matter

    Pages i-vii
    Download chapter PDF

  2. Overview

    1. On IEEE P1500’s Standard for Embedded Core Test

      • Erik Jan Marinissen, Rohit Kapur, Maurice Lousberg, Teresa McLaurin, Mike Ricchetti, Yervant Zorian et al.
      Pages 1-19

  3. Test Planning, Access and Scheduling

    1. An Integrated Framework for the Design and Optimization of SOC Test Solutions

      • Erik Larsson, Zebo Peng, Krishnendu Chakrabarty
      Pages 21-36

    2. On Concurrent Test of Core-Based SOC Design

      • Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan et al.
      Pages 37-50

    3. A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm

      • Sandeep Koranne, Krishnendu Chakrabarty
      Pages 51-70

    4. The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs

      • Erik Jan Marinissen
      Pages 71-90

    5. CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

      • Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki, Krishnendu Chakrabarty
      Pages 91-109

    6. An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch

      • Subhayu Basu, Indranil Sengupta, Dipanwita Roy Chowdhury, Sudipta Bhawmik, Krishnendu Chakrabarty
      Pages 111-121

    7. Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores

      • Tomokazu Yoneda, Hideo Fujiwara
      Pages 123-137

  4. Test Data Compression

    1. Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor

      • Abhijit Jas, Nur A. Touba, Krishnendu Chakrabarty
      Pages 139-150

    2. Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test

      • Jin-Fu Li, Ruey-Shing Tzeng, Cheng-Wen Wu, Krishnendu Chakrabarty
      Pages 151-163

  5. Interconnect, Crosstalk and Signal Integrity

    1. Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores

      • Chen Li, Xiaoliang Bai, Sujit Dey, Krishnendu Chakrabarty
      Pages 165-174

    2. Signal Integrity: Fault Modeling and Testing in High-Speed SoCs

      • Mehrdad Nourani, Amir Attarha, Krishnendu Chakrabarty
      Pages 175-190

    3. On-Chip Clock Faults’ Detector

      • Cecilia Metra, Michele Favalli, Stefano Di Francescantonio, Bruno Riccò, Krishnendu Chakrabarty
      Pages 191-200
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Keywords

About this book

System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design and manufacturing capabilities. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. In addition, long interconnects, high density, and high-speed designs lead to new types of faults involving crosstalk and signal integrity.

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation is an edited work containing thirteen contributions that address various aspects of SOC testing.

SOC (System-on-a-Chip) Testing for Plug and Play Test Automation is a valuable reference for researchers and students interested in various aspects of SOC testing.

Editors and Affiliations

  • Duke University, USA

    Krishnendu Chakrabarty

Bibliographic Information

  • Book Title: SOC (System-on-a-Chip) Testing for Plug and Play Test Automation

  • Editors: Krishnendu Chakrabarty

  • Series Title: Frontiers in Electronic Testing

  • DOI: https://doi.org/10.1007/978-1-4757-6527-4

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer Science+Business Media New York 2002

  • Hardcover ISBN: 978-1-4020-7205-5Published: 30 September 2002

  • Softcover ISBN: 978-1-4419-5307-0Published: 12 December 2011

  • eBook ISBN: 978-1-4757-6527-4Published: 17 April 2013

  • Series ISSN: 0929-1296

  • Edition Number: 1

  • Number of Pages: VIII, 200

  • Additional Information: Reprinted from JOURNAL OF ELECTRONIC TESTING, 18:4-5

  • Topics: Circuits and Systems, Electrical Engineering, Computer-Aided Engineering (CAD, CAE) and Design

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