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Analog Circuits and Signal Processing

Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers

Authors: Mak, Pui-In, U Seng Pan, Ben, Martins, Rui Paulo

  • Up-to-date survey and detailed study of the state-of-the-art transceivers for modern single- and multi-purpose wireless communication systems
  • Comprehensive analysis and design of multimode reconfigurable receivers and transmitters for an efficient multistandard compliance
  • Methodical design of true low-voltage baseband circuits in CMOS
  • Design and implementation of the state-of-the-art lowest voltage baseband programmable-gain amplifier in CMOS
  • Design and implementation of the state-of-the-art lowest voltage flexible-IF receiver analog baseband for IEEE 802.11a/b/g WLAN in CMOS
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About this book

With the past few decade efforts on lithography and integrated-circuit (IC) technologies, very low-cost microsystems have been successfully developed for many different applications. The trend in wireless communications is toward creating a networkubiquitous era in the years to come. Many unprecedented opportunities and challenges, such as Design for multi-standardability and low-voltage (LV) compliance, are rapidly becoming the mainstream directions in wireless-IC research and development, given that the former can offer the best connectivity among different networks, while the latter can facilitate the technology migration into the sub-1-V nanoscale regimes for further cost and power reduction.

Analog-Baseband Architecturees and Circuits presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. The first part of the book reviews the physical layer specifications of modern wireless communication standards, presents the fundamental tradeoffs involved in transceiver architecture selection, and provides case studies of the state-of-the-art multistandard transceivers, where the key techniques reinforced are highlighted and discussed. A statistical summary (with 100+ references cited) of most used transmitter and receiver architectures for modern communication standards is provided. All the references are citied from the leading forums, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.

The second part focuses on the architectural design of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection technique is disclosed. It, through the reconfiguration of receiver and transmitter analog basebands, enables not only a relaxation of the RF frequency synthesizer’s and local oscillator’s design specifications, but also an efficient multistandard compliance by synthesizing the low-IF and zero-IF in the receiver; and the direct-up and two-step-up in the transmitter. The principle is demonstrated in few design examples. One of them is a system-in-a-package (SiP) receiver analog  baseband for IEEE 802.11a/b/g WLAN. It not only has the two-step channel selection embedded, but also features a flexible-IF topology, a unique 3D-stack floorplan, and a particular design methodology for high testability and routability.

The third part deals with the circuit design. In addition to the methodical description of many LV circuit techniques, 3 tailormade LV-robust functional blocks are presented. They include: 1) a double-quadrature-downconversion filter (DQDF) – it realizes concurrently clock-rate-defined IF reception, I/Q demodulation, IF channel selection and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it offers a transient-free constant-bandwidth gain adjustment. 3) An inside-OpAmp dc-offset canceler – it saves the silicon area required for realizing a large time constant on chip while maximizing its highpass-pole switchability for fast dc-offset transient.

The last part presents experimental results of the 3 tailor-made building blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS process. Previously untold on-/off-chip co-setup for both full-chip and building blocks measurements are described. Not only the building blocks have successfully extended the state-of-the-art boundary in terms of signal bandwidth and supply voltage, the analog-baseband IC has been so far the lowest-voltage-reported solution for IEEE 802.11a/b/g WLAN receivers.

Table of contents (7 chapters)

  • Introduction

    Pages 1-8

  • Transceiver Architecture Selection – Review, State-Of-The-Art Survey And Case Study

    Pages 9-40

  • Two-Step Channel Selection – A Technique For Multistandard Transceiver Front-Ends

    Pages 41-69

  • System Design Of A Sip Receiver For Ieee 802.11a/B/G Wlan

    Pages 71-87

  • Low-Voltage Analog-Baseband Techniques

    Pages 89-141

Buy this book

eBook $149.00
price for USA (gross)
  • ISBN 978-1-4020-6433-3
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $199.00
price for USA
  • ISBN 978-1-4020-6432-6
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $199.00
price for USA
  • ISBN 978-90-481-7640-3
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers
Authors
Series Title
Analog Circuits and Signal Processing
Copyright
2007
Publisher
Springer Netherlands
Copyright Holder
Springer Science+Business Media B.V.
eBook ISBN
978-1-4020-6433-3
DOI
10.1007/978-1-4020-6433-3
Hardcover ISBN
978-1-4020-6432-6
Softcover ISBN
978-90-481-7640-3
Series ISSN
1872-082X
Edition Number
1
Number of Pages
XXII, 178
Topics