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The Springer International Series in Engineering and Computer Science

Logic Minimization Algorithms for VLSI Synthesis

Authors: Brayton, R.K., Hachtel, G.D., McMullen, C., Sangiovanni-Vincentelli, A.

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About this book

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor­ tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza­ tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen­ tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee.

Reviews

`In short, a quite remarkable realization in the field.' Zentrallblatt für Mathematik (1986)

Table of contents (7 chapters)

  • Introduction

    Brayton, Robert K. (et al.)

    Pages 1-14

  • Basic Definitions

    Brayton, Robert K. (et al.)

    Pages 15-28

  • Decomposition and Unate Functions

    Brayton, Robert K. (et al.)

    Pages 29-53

  • The Espresso-II Minimization Loop and Algorithms

    Brayton, Robert K. (et al.)

    Pages 54-138

  • Multiple-Valued Logic Minimization

    Brayton, Robert K. (et al.)

    Pages 139-147

Buy this book

eBook $169.00
price for USA (gross)
  • ISBN 978-1-4613-2821-6
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $219.00
price for USA
  • ISBN 978-0-89838-164-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $219.00
price for USA
  • ISBN 978-1-4612-9784-0
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Logic Minimization Algorithms for VLSI Synthesis
Authors
Series Title
The Springer International Series in Engineering and Computer Science
Series Volume
2
Copyright
1984
Publisher
Springer US
Copyright Holder
Kluwer Academic Publishers
eBook ISBN
978-1-4613-2821-6
DOI
10.1007/978-1-4613-2821-6
Hardcover ISBN
978-0-89838-164-1
Softcover ISBN
978-1-4612-9784-0
Series ISSN
0893-3405
Edition Number
1
Number of Pages
XII, 194
Topics