Principles of Verifiable RTL Design

A functional coding style supporting verification processes in Verilog

Authors: Bening, Lionel, Foster, Harry D.

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About this book

System designers, computer scientists and engineers have c- tinuously invented and employed notations for modeling, speci- ing, simulating, documenting, communicating, teaching, verifying and controlling the designs of digital systems. Initially these s- tems were represented via electronic and fabrication details. F- lowing C. E. Shannon’s revelation of 1948, logic diagrams and Boolean equations were used to represent digital systems in a fa- ion that de-emphasized electronic and fabrication detail while revealing logical behavior. A small number of circuits were made available to remove the abstraction of these representations when it was desirable to do so. As system complexity grew, block diagrams, timing charts, sequence charts, and other graphic and symbolic notations were found to be useful in summarizing the gross features of a system and describing how it operated. In addition, it always seemed necessary or appropriate to augment these documents with lengthy verbal descriptions in a natural language. While each notation was, and still is, a perfectly valid means of expressing a design, lack of standardization, conciseness, and f- mal definitions interfered with communication and the understa- ing between groups of people using different notations. This problem was recognized early and formal languages began to evolve in the 1950s when I. S. Reed discovered that flip-flop input equations were equivalent to a register transfer equation, and that xvi tor-like notation. Expanding these concepts Reed developed a no- tion that became known as a Register Transfer Language (RTL).

Table of contents (10 chapters)

Buy this book

eBook $159.00
price for USA (gross)
  • ISBN 978-0-306-47631-0
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $249.00
price for USA
  • ISBN 978-0-7923-7368-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $209.00
price for USA
  • ISBN 978-1-4757-7418-4
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Principles of Verifiable RTL Design
Book Subtitle
A functional coding style supporting verification processes in Verilog
Authors
Copyright
2001
Publisher
Springer US
Copyright Holder
Springer Science+Business Media New York
eBook ISBN
978-0-306-47631-0
DOI
10.1007/b116575
Hardcover ISBN
978-0-7923-7368-1
Softcover ISBN
978-1-4757-7418-4
Edition Number
2
Number of Pages
XXIV, 282
Topics