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Nanometer Technology Designs

High-Quality Delay Tests

Authors: Ahmed, Nisar

  • Identifies defects in traditional at-speed test methods
  • Proposes new techniques and methodologies to improve the overall quality of transition fault tests
  • Includes discussion of the effects of IR-drop
  • Provides an introduction to path delay and transition delay fault models and test methods
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eBook $139.00
price for USA (gross)
  • ISBN 978-0-387-75728-5
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $179.00
price for USA
  • ISBN 978-0-387-76486-3
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $179.00
price for USA
  • ISBN 978-1-4419-4559-4
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
About this book

While adopting newer, better fabrication technologies provides higher integration and enhances performance, it also increases the types of manufacturing defects. With design size in millions of gates and working frequency in GHz, timing-related defects have become a high proportion of the total chip defects. For nanometer technology designs, the traditional test methods cannot ensure a high quality level of chips, and at-speed tests using path and transition delay fault model have become a requirement in technologies below 180nm.

Nanometer Technology Designs: High-Quality Delay Tests discusses these challenges in detail and proposes new techniques and methodologies to improve the overall quality of the delay test for nanotechnology designs. Topics covered include:

  • At-speed test challenges for nanotechnology
  • Low-cost tester-friendly design-for-test techniques
  • Improving test quality of current at-speed test methods
  • Functionally un-testable fault list generation and avoidance
  • Timing-based ATPG for screening small delay faults
  • Faster-than-at-speed test considering power supply noise
  • Power supply noise tolerant at-speed test pattern generation and application
  • Solutions for dealing with crosstalk and signal integrity issues

Nanometer Technology Designs: High-Quality Delay Tests is a reference for practicing engineers and researchers in both industry and academia who are interested in learning about and implementing the most-advanced methods in nanometer delay testing.

Table of contents (1 chapters)

  • IR-drop Tolerant At-speed Test Pattern Generation

    Pages 177-205

Buy this book

eBook $139.00
price for USA (gross)
  • ISBN 978-0-387-75728-5
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $179.00
price for USA
  • ISBN 978-0-387-76486-3
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $179.00
price for USA
  • ISBN 978-1-4419-4559-4
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Nanometer Technology Designs
Book Subtitle
High-Quality Delay Tests
Authors
Copyright
2008
Publisher
Springer US
Copyright Holder
Springer-Verlag US
eBook ISBN
978-0-387-75728-5
DOI
10.1007/978-0-387-75728-5
Hardcover ISBN
978-0-387-76486-3
Softcover ISBN
978-1-4419-4559-4
Edition Number
1
Number of Pages
XVIII, 281
Number of Illustrations and Tables
140 b/w illustrations
Topics