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The Springer International Series in Engineering and Computer Science

Design of Very High-Frequency Multirate Switched-Capacitor Circuits

Extending the Boundaries of CMOS Analog Front-End Filtering

Authors: U Seng Pan, Ben, Martins, Rui Paulo, Epifanio da Franca, Jose de Albuquerque

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About this book

Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed:

-Optimum circuit architecture tradeoff analysis
-Simple speed and power trade-off analysis of active elements
-High-order filtering response accuracy with respect to capacitor-ratio mismatches
-Time-interleaved effect with respect to gain and offset mismatch
-Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding
-Stage noise analysis and allocation scheme
-Substrate and supply noise reduction
-Gain-and offset-compensation techniques
-High-bandwidth low-power amplifier design and layout
-Very low timing-skew multiphase generation

Two tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highest dynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS.

Buy this book

eBook $149.00
price for USA (gross)
  • ISBN 978-0-387-26122-5
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $199.00
price for USA
  • ISBN 978-0-387-26121-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $199.00
price for USA
  • ISBN 978-1-4419-3867-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Design of Very High-Frequency Multirate Switched-Capacitor Circuits
Book Subtitle
Extending the Boundaries of CMOS Analog Front-End Filtering
Authors
Series Title
The Springer International Series in Engineering and Computer Science
Series Volume
867
Copyright
2006
Publisher
Springer US
Copyright Holder
Springer-Verlag US
Distribution Rights
Distribution rights for India: CBS Publishers, New Delhi, India
eBook ISBN
978-0-387-26122-5
DOI
10.1007/b136837
Hardcover ISBN
978-0-387-26121-8
Softcover ISBN
978-1-4419-3867-1
Series ISSN
0893-3405
Edition Number
1
Number of Pages
XXXII, 228
Topics