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Guide to RISC Processors

for Programmers and Engineers

  • Book
  • © 2005

Overview

  • Provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as all the popular modern RISC processors and their assembly language

  • Integrates core concepts to processor designs and their implementations

  • Includes MIPS simulator (SPIM) download instructions, so readers can get hands-on assembly language programming experience

  • Presents material in a manner suitable for self-study

  • Provides many examples and chapter introductions and summaries

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Table of contents (17 chapters)

  1. Overview

  2. Architectures

  3. MIPS Assembly Language

Keywords

About this book

Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource.

Authors and Affiliations

  • School of Computer Science, Carleton University, Ottawa, Canada

    Sivarama P. Dandamudi

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