Logo - springer
Slogan - springer

Physics - Applied & Technical Physics | Adiabatic Logic - Future Trend and System Level Perspective

Adiabatic Logic

Future Trend and System Level Perspective

Teichmann, Philip

2012, XVIII, 166 p.

Available Formats:
eBook
Information

Springer eBooks may be purchased by end-customers only and are sold without copy protection (DRM free). Instead, all eBooks include personalized watermarks. This means you can read the Springer eBooks across numerous devices such as Laptops, eReaders, and tablets.

You can pay for Springer eBooks with Visa, Mastercard, American Express or Paypal.

After the purchase you can directly download the eBook file or read it online in our Springer eBook Reader. Furthermore your eBook will be stored in your MySpringer account. So you can always re-download your eBooks.

 
$119.00

(net) price for USA

ISBN 978-94-007-2345-0

digitally watermarked, no DRM

Included Format: PDF and EPUB

download immediately after purchase


learn more about Springer eBooks

add to marked items

Hardcover
Information

Hardcover version

You can pay for Springer Books with Visa, Mastercard, American Express or Paypal.

Standard shipping is free of charge for individual customers.

 
$159.00

(net) price for USA

ISBN 978-94-007-2344-3

free shipping for individuals worldwide

usually dispatched within 3 to 5 business days


add to marked items

Softcover
Information

Softcover (also known as softback) version.

You can pay for Springer Books with Visa, Mastercard, American Express or Paypal.

Standard shipping is free of charge for individual customers.

 
$159.00

(net) price for USA

ISBN 978-94-007-3727-3

free shipping for individuals worldwide

usually dispatched within 3 to 5 business days


add to marked items

  • This is the first comprehensive book on Adiabatic Logic systems
  • It presents how Adiabatic Logic will perform with future scaling, future devices and degrading effects
  • It presents measurement results of a manufactured adiabatic system and compares it to static CMOS
  • Design methodology is presented to generate more energy efficient and less area consuming adiabatic digital signal processing units

Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by adiabatic logic. In addition, the impact of worsening degradation effects has to be considered in the design of adiabatic circuits. The impact of the technology trends on the figures of merit of adiabatic logic, energy saving potential and optimum operating frequency, are investigated, as well as degradation related issues. Adiabatic logic benefits from future devices, is not susceptible to Hot Carrier Injection, and shows less impact of Bias Temperature Instability than static CMOS circuits. Major interest also lies on the efficient generation of the applied power-clock signal. This oscillating power supply can be used to save energy in short idle times by disconnecting circuits. An efficient way to generate the power-clock is by means of the synchronous 2N2P LC oscillator, which is also robust with respect to pattern-induced capacitive variations. An easy to implement but powerful power-clock gating supplement is proposed by gating the synchronization signals. Diverse implementations to shut down the system are presented and rated for their applicability and other aspects like energy reduction capability and data retention. Advantageous usage of adiabatic logic requires compact and efficient arithmetic structures. A broad variety of adder structures and a Coordinate Rotation Digital Computer are compared and rated according to energy consumption and area usage, and the resulting energy saving potential against static CMOS proves the ultra-low-power capability of adiabatic logic. In the end, a new circuit topology has to compete with static CMOS also in productivity. On a 130nm test chip, a large scale test vehicle containing an FIR filter was implemented in adiabatic logic, utilizing a standard, library-based design flow, fabricated, measured and compared to simulations of a static CMOS counterpart, with measured saving factors compliant to the values gained by simulation. This leads to the conclusion that adiabatic logic is ready for productive design due to compatibility not only to CMOS technology, but also to electronic design automation (EDA) tools developed for static CMOS system design.

Content Level » Research

Keywords » Adiabatic Circuits - CMOS Design - Circuits & Systems - Clock Frequency - Devices - Energy Efficient Microelectronics - Low-Power Electronics - Microelectronics - Oscillators

Related subjects » Applied & Technical Physics - Circuits & Systems - Electronics & Electrical Engineering - Energy Efficiency - Hardware

Table of contents / Preface / Sample pages 

Popular Content within this publication 

 

Articles

Read this Book on Springerlink

Services for this book

New Book Alert

Get alerted on new Springer publications in the subject area of Electronic Circuits and Devices.