Overview
- Authors:
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Gaurav Singh
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Intel Corporation, Austin, USA
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Sandeep K. Shukla
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Bradley Dept. Electrical &, Computer Engineering, Virginia Tech, Blacksburg, USA
- Presents detailed analysis of various power optimization problems associated with high-level synthesis, as well as novel techniques for reducing power consumption of hardware designs at higher level of abstraction
- Discusses various formal verification issues associated with synthesizing different possible versions of a hardware design (differing in their latency, area, and/or power consumption)
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Table of contents (10 chapters)
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Front Matter
Pages i-xxix
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- Gaurav Singh, Sandeep K. Shukla
Pages 1-12
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- Gaurav Singh, Sandeep K. Shukla
Pages 13-24
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- Gaurav Singh, Sandeep K. Shukla
Pages 25-34
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- Gaurav Singh, Sandeep K. Shukla
Pages 35-43
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- Gaurav Singh, Sandeep K. Shukla
Pages 45-64
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- Gaurav Singh, Sandeep K. Shukla
Pages 65-82
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- Gaurav Singh, Sandeep K. Shukla
Pages 83-101
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- Gaurav Singh, Sandeep K. Shukla
Pages 103-113
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- Gaurav Singh, Sandeep K. Shukla
Pages 115-139
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- Gaurav Singh, Sandeep K. Shukla
Pages 141-143
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Back Matter
Pages 145-153
About this book
Human lives are getting increasingly entangled with technology, especially comp- ing and electronics. At each step we take, especially in a developing world, we are dependent on various gadgets such as cell phones, handheld PDAs, netbooks, me- cal prosthetic devices, and medical measurement devices (e.g., blood pressure m- itors, glucometers). Two important design constraints for such consumer electronics are their form factor and battery life. This translates to the requirements of reduction in the die area and reduced power consumption for the semiconductor chips that go inside these gadgets. Performance is also important, as increasingly sophisticated applications run on these devices, and many of them require fast response time. The form factor of such electronics goods depends not only on the overall area of the chips inside them but also on the packaging, which depends on thermal ch- acteristics. Thermal characteristics in turn depend on peak power signature of the chips. As a result, while the overall energy usage reduction increases battery life, peak power reduction in?uences the form factor. One more important aspect of these electronic equipments is that every 6 months or so, a newer feature needs to be added to keep ahead of the market competition, and hence new designs have to be completed with these new features, better form factor, battery life, and performance every few months. This extreme pressure on the time to market is another force that drives the innovations in design automation of semiconductor chips.
Authors and Affiliations
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Intel Corporation, Austin, USA
Gaurav Singh
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Bradley Dept. Electrical &, Computer Engineering, Virginia Tech, Blacksburg, USA
Sandeep K. Shukla
