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Nanoscale VLSI

Devices, Circuits and Applications

  • Book
  • © 2020

Overview

Editors:
  1. Rohit Dhiman

    1. Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur (HP), Hamirpur, India

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  2. Rajeevan Chandel

    1. Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur (HP), Hamirpur, India

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  • Elucidates advanced technologies for efficient exploration of low voltage, low power, VLSI
  • devices, circuits and their applications at the system level
  • Illustrates design constraints related to optimizing the device performance and addresses
  • modeling and simulation aspects
  • Explores physics and architecture of non-conventional materials from the designers’

Part of the book series: Energy Systems in Electrical Engineering (ESIEE)

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Table of contents (15 chapters)

  1. Front Matter

    Pages i-xiii
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  2. Low Voltage and Low Power VLSI Design

    1. Front Matter

      Pages 1-1
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    2. Low-Voltage Analog Integrated Circuit Design

      • Deepika Gupta
      Pages 3-22

    3. Design Methodology for Ultra-Low-Power CMOS Analog Circuits for ELF-SLF Applications

      • Soumya Pandit
      Pages 23-43

    4. Orthogonally Controllable VQO for Low-Voltage Applications

      • Bhartendu Chaturvedi, Jitendra Mohan, Atul Kumar
      Pages 45-63

    5. Low Power Design Techniques for Integrated Circuits

      • Bipin Chandra Mandi
      Pages 65-80

  3. Modeling and Simulation for Post-CMOS Devices

    1. Front Matter

      Pages 81-81
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    2. Bilayer Graphene Nanoribbon Tunnel FET for Low-Power Nanoscale IC Design

      • Vobulapuram Ramesh Kumar, Uppu Madhu Sai Lohith, Shaik Javid Basha, M. Ramana Reddy
      Pages 83-100

    3. A Threshold Voltage Model for SiGe Source/Drain Silicon-Nanotube-Based Junctionless Field-Effect Transistor

      • Anchal Thakur, Rohit Dhiman
      Pages 101-112

    4. III-V Nanoscale Quantum-Well Field-Effect Transistors for Future High-Performance and Low-Power Logic Applications

      • J. Ajayan, D. Nirmal
      Pages 113-137

    5. FinFET: A Beginning of Non-planar Transistor Era

      • Kajal, Vijay Kumar Sharma
      Pages 139-159

  4. Emerging Technologies for Integrated Circuits

    1. Front Matter

      Pages 161-161
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    2. Gallium Nitride—Emerging Future Technology for Low-Power Nanoscale IC Design

      • Sahil Sankhyan, Tarun Chaudhary, Gargi Khanna, Rajeevan Chandel
      Pages 163-171

    3. A Low-Power Hybrid VS-CNTFET-CMOS Ring Voltage-Controlled Oscillator Using Current Starved Power Switching Technology

      • Ashish Raman, Vikas Kumar Malav, Ravi Ranjan, R. K. Sarin
      Pages 173-202

    4. Chip-Level Optical Interconnect in Electro-optics Platform

      • Sajal Agarwal, Y. K. Prajapati
      Pages 203-223

    5. Emerging Graphene FETs for Next-Generation Integrated Circuit Design

      • Yash Agrawal, Eti Maheshwari, Mekala Girish Kumar, Rajeevan Chandel
      Pages 225-237

  5. System Level Applications

    1. Front Matter

      Pages 239-239
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    2. Power and Area-Efficient Architectural Design Methodology for Nanomagnetic Computation

      • Santhosh Sivasubramani, Sanghamitra Debroy, Amit Acharyya
      Pages 241-270

    3. Design Space Exploration of DSP Hardware Using Adaptive PSO and Bacterial Foraging for Power/Area-Delay Trade-Off

      • Anirban Sengupta, Mahendra Rathor, Pallabi Sarkar
      Pages 271-293

    4. Register-Transfer-Level Design for Application-Specific Integrated Circuits

      • Dilip Singh, Rajeevan Chandel
      Pages 295-319
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Keywords

About this book

This book describes methodologies in the design of VLSI devices, circuits and their applications at nanoscale levels. The book begins with the discussion on the dominant role of power dissipation in highly scaled devices.The 15 Chapters of the book are classified under four sections that cover design, modeling, and simulation of electronic, magnetic and compound semiconductors for their applications in VLSI devices, circuits, and systems. This comprehensive volume eloquently presents the design methodologies for ultra–low power VLSI design, potential post–CMOS devices, and their applications from the architectural and system perspectives. The book shall serve as an invaluable reference book for the graduate students, Ph.D./ M.S./ M.Tech. Scholars, researchers, and practicing engineers working in the frontier areas of nanoscale VLSI design.  


Editors and Affiliations

  • Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur (HP), Hamirpur, India

    Rohit Dhiman, Rajeevan Chandel

About the editors

Rohit Dhiman received his B.Tech. in Electronics & Communication Engineering from HP 

University Shimla, India in 2007. He did his M.Tech. Degree in VLSI Design from National 

Institute of Technology (NIT) Hamirpur in 2009. He was awarded Ph.D. Degree from NIT 

Hamirpur in 2014. Presently Dr. Rohit Dhiman is working as an Assistant Professor in 

Electronics & Communication Engineering Department at NIT Hamirpur and is the 

author/co-author of Research Publications in International Journals and Conference 

proceedings of repute. He has also edited/ authored three books published by the IET and 

Springer. He has been awarded with the Young Scientist Award from the Science and 

Engineering Research Board, Department of Science & Technology GoI, New Delhi. He is 

recipient of the prestigious Young Faculty Research Fellowship of the Ministry of Electronics 

and Information Technology (MeitY), Govt. of India and has two sponsored research 

projects to his credit. His major research interest is in device and circuit modelling for low 

power nanoscale IC design. 

Rajeevan Chandel received B.E. Degree in E&CE from Thapar Institute of Engineering & Technology (now Thapar University), Patiala, India in 1990. She is a double gold medalist of Himachal Pradesh University, Shimla in Pre-Univ. and Pre-Engg. in 1985 and 1986 respectively. She did her M. Tech. Degree in Integrated Electronics and Circuits, from Indian Institute of Technology (IIT) Delhi in 1997. She was awarded Ph.D. Degree from IIT Roorkee, India in 2005. Dr. Chandel joined Department of E&CE, NIT Hamirpur as Lecturer in 1990, where presently she is working as Professor. Dr. Chandel has been Head of the E&CE Department twice and was formerly Dean (Research & Consultancy) at NIT Hamirpur. She has over 150 research papers in peer reviewed International Journals of repute and Conferences. She has six sponsored projects to her credit from Govt. of India. Currently, she is the Chief Investigator of the prestigious SMDP-C2SD project of MeitY, New Delhi. She has also edited/authored three books of IET and Springer. Her research interests are electronics circuit modelling and low power VLSI design. She is a Fellow of IETE (I) and life member of ISTE (I) and member of IEEE, ISSS and VSI. 

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