Embedded Computer Systems: Architectures, Modeling, and Simulation

1. Front Matter

   PDF

2. Keynote

   1. Platform Thinking in Embedded Systems

      • Bob Iannucci

      Pages 1-1

3. Reconfigurable System Design and Implementations

   1. Interprocedural Optimization for Dynamic Hardware Configurations

      • Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis

      Pages 2-11

   2. Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques

      • M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A. M. Obeid et al.

      Pages 12-21

   3. Reconfigurable Multiple Operation Array

      • Humberto Calderon, Stamatis Vassiliadis

      Pages 22-31

   4. RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration

      • Guillermo Payá Vayá, Javier Martín Langerwerf, Peter Pirsch

      Pages 32-40

   5. Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping

      • Ricardo Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto

      Pages 41-50

   6. Automatic FIR Filter Generation for FPGAs

      • Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich

      Pages 51-61

   7. Two-Dimensional Fast Cosine Transform for Vector-STA Architectures

      • J. P. Robelly, A. Lehmann, G. Fettweis

      Pages 62-71

   8. Configurable Computing for High-Security/High-Performance Ambient Systems

      • Guy Gogniat, Wayne Burleson, Lilian Bossuet

      Pages 72-81

   9. FPL-3E: Towards Language Support for Reconfigurable Packet Processing

      • Mihai Lucian Cristea, Claudiu Zissulescu, Ed Deprettere, Herbert Bos

      Pages 82-92

4. Processor Architectures, Design and Simulation

   1. Flux Caches: What Are They and Are They Useful?

      • Georgi N. Gaydadjiev, Stamatis Vassiliadis

      Pages 93-102

   2. First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption

      • Cheol Hong Kim, Sunghoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon

      Pages 103-111

   3. A Novel JAVA Processor for Embedded Devices

      • Yiyu Tan, Chihang Yau, Kaiman Lo, Paklun Mok, Anthony S. Fong

      Pages 112-121

   4. Formal Specification of a Protocol Processor

      • Tomi Westerlund, Juha Plosila

      Pages 122-131

   5. Tuning a Protocol Processor Architecture Towards DSP Operations

      • Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho

      Pages 132-141

   6. Observations on Power-Efficiency Trends in Mobile Communication Devices

      • Olli Silvén, Kari Jyrkkä

      Pages 142-151

   7. CORDIC-Augmented Sandbridge Processor for Channel Equalization

      • Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane

      Pages 152-161

   8. Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic

      • Sunghoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon

      Pages 162-171

   9. Exploiting Intra-function Correlation with the Global History Stack

      • Fei Gao, Suleyman Sair

      Pages 172-181

The SAMOS workshop is an international gathering of highly quali?ed researchers from academia and industry, sharing in a 3-day lively discussion on the quiet and - spiring northern mountainside of the Mediterranean island of Samos. As a tradition, the workshop features workshop presentations in the morning, while after lunch all kinds of informal discussions and nut-cracking gatherings take place. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved problems and in-depth topical reviews can be unleashed in the sci- ti?c arena. Consequently, the workshop provides the participants with an environment where collaboration rather than competition is fostered. The earlier workshops, SAMOS I–IV (2001–2004), were composed only of invited presentations. Due to increasing expressions of interest in the workshop, the Program Committee of SAMOS V decided to open the workshop for all submissions. As a result the SAMOS workshop gained an immediate popularity; a total of 114 submitted papers were received for evaluation. The papers came from 24 countries and regions: Austria (1), Belgium (2), Brazil (5), Canada (4), China (12), Cyprus (2), Czech Republic (1), Finland (15), France (6), Germany (8), Greece (5), Hong Kong (2), India (2), Iran (1), Korea (24), The Netherlands (7), Pakistan (1), Poland (2), Spain (2), Sweden (2), T- wan (1), Turkey (2), UK (2), and USA (5). We are grateful to all of the authors who submitted papers to the workshop.

• Assembler
• Embedded System
• System
• WLAN
• architecture
• computer architecture
• embedded systems
• network on chip (NoC)
• optimization
• processor design
• reconfigurable architectures
• security
• simulation
• system on chip (SoC)
• systems

• Department of Computer Systems, Tampere University of Technology, Tampere, Finland

  Timo D. Hämäläinen

• Computer Systems Architecture Group, University of Amsterdam, The Netherlands

  Andy D. Pimentel

• Tampere University of Technology, Tampere, Finland

  Jarmo Takala

• Computer Engineering Lab, TUDelft., Delft, The Netherlands

  Stamatis Vassiliadis

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