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FPGA-based Digital Convolution for Wireless Applications

  • Book
  • © 2017

Overview

  • Builds a bridge to close the gap between “thinkers” and “doers”
  • Presents essential perspectives on digital convolutions in wireless communications systems, one of the most important and widely used functions in digital signal processing
  • Covers digital convolutions in wireless communications systems from basic concept to vivid simulation/illustration
  • Includes supplementary material: sn.pub/extras

Part of the book series: Springer Series in Wireless Technology (SSWT)

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Table of contents (6 chapters)

Keywords

About this book

This book presents essential perspectives on digital convolutions in wireless communications systems and illustrates their corresponding efficient real-time field-programmable gate array (FPGA) implementations. 

FPGAs or generic all programmable devices will soon become widespread, serving as the “brains” of all types of real-time smart signal processing systems, like smart networks, smart homes and smart cities. The book examines digital convolution by bringing together the following main elements: the fundamental theory behind the mathematical formulae together with corresponding physical phenomena; virtualized algorithm simulation together with benchmark real-time FPGA implementations; and detailed, state-of-the-art case studies on wireless applications, including popular linear convolution in digital front ends (DFEs); nonlinear convolution in digital pre-distortion (DPD) enabled high-efficiency wireless RF transceivers; and fast linear convolution in massive multiple-input multiple-output (MIMO) systems.

After reading this book, students and professionals will be able to:

·         Understand digital convolution with inside-out information: discover what convolution is, why it is important and how it works.

·         Enhance their FPGA design skills, i.e., enhance their FPGA-related prototyping capability with model-based hands-on examples.

·         Rapidly expand their digital signal processing (DSP) blocks: to examine how to rapidly and efficiently create (DSP) functional blocks on a programmable FPGA chip as a reusable intellectual property (IP) core.

·         Upgrade their expertise as both “thinkers” and “doers”: minimize/close the gap between mathematical equations and FPGA implementations for existing and emerging wireless applications.

 

 

Authors and Affiliations

  • Nokia Bell Labs , Dublin, Ireland

    Lei Guan

About the author

Dr. Lei Guan has been actively working as wireless communications researcher, FPGA designer, and
digital system architect for 10 years with extensive R&D experience in FPGA & MATLAB based
digital signal processing, particularly using Xilinx FPGAs and all programmable SoCs for digitally assisted wireless RF systems and fully tunable software defined radio (SDR) systems. He is a
member of technical staff at Mobile Radio Research, Nokia Bell Labs. He holds a B.E. degree in
Communications Engineering and a M.E. degree in Telecommunication Systems from Harbin
Institute of Technology (HIT), P. R. China (Top-five University in China in engineering subject) and a
Ph.D. degree in Electronic Engineering from University College Dublin, Ireland.




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