Multi-Chip Module Test Strategies

1. Front Matter

   Pages 1-6

   PDF

2. Introduction

   1. Fundamentals of MCM Testing and Design-for-Testability

      • Yervant Zorian, V. D. Agrawal

      Pages 7-14

3. Die Level Testing

   1. Known Good Die

      • Larry Gilg, Y. Zorian

      Pages 15-25

4. Substrate Testing

   1. A Survey of Test Techniques for MCM Substrates

      • Madhavan Swaminathan, Bruce Kim, Abhijit Chatterjee, Y. Zorian

      Pages 27-38

   2. Smart Substrate MCMs

      • Anne E. Gattiker, Wojciech Maly, Y. Zorian

      Pages 39-53

   3. Electron Beam Probing—A Solution for MCM Test and Failure Analysis

      • R. Schmid, R. Schmitt, M. Brunner, O. Gessner, M. Sturm, Y. Zorian

      Pages 55-63

5. Module Level Test

   1. MCM Test Strategy Synthesis from Chip Test and Board Test Approaches

      • Andrew Flint, Y. Zorian

      Pages 65-76

   2. Designing “Dual Personality” IEEE 1149.1 Compliant Multi-Chip Modules

      • Najmi Jarwala, Y. Zorian

      Pages 77-86

   3. An Effective Multi-Chip BIST Scheme

      • Yervant Zorian, Hakim Bederr, V. D. Agrawal

      Pages 87-95

6. MCM Test Applications

   1. Design-for-Test in a Multiple Substrate Multichip Module

      • Joel A. Jorgenson, Russell J. Wagner, Y. Zorian

      Pages 97-108

   2. A Test Methodology for High Performance MCMs

      • Thomas M. Storey, Bruce McWilliam, Y. Zorian

      Pages 109-118

7. Module Level Diagnosis

   1. A Formalization of the IEEE 1149.1–1990 Diagnostic Methodology as Applied to Multichip Modules

      • Ken Posse, Y. Zorian

      Pages 119-125

   2. Multichip Module Diagnosis by Product-Code Signatures

      • P. Nagvajara, J. Lin, P. Nilagupta, C. Wang, Y. Zorian

      Pages 127-135

8. Simulation Techniques for MCMs

   1. Simulation Techniques for the Manufacturing Test of MCMs

      • Mick Tegethoff, Tom Chen, Y. Zorian

      Pages 137-149

9. MCM Test Economics

   1. Economic Analysis of Test Process Flows for Multichip Modules Using Known Good Die

      • Cynthia F. Murphy, Magdy S. Abadir, Peter A. Sandborn, Y. Zorian

      Pages 151-166

10. Back Matter

    Pages 167-167

    PDF

MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs.
Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain.
Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2).

• VLSI
• complexity
• diagnosis
• manufacturing
• simulation
• testing

• Logic Vision, Inc., USA

  Yervant Zorian

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