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Digital Signal Processing with Field Programmable Gate Arrays

  • Textbook
  • © 2004

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Part of the book series: Signals and Communication Technology (SCT)

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Table of contents (8 chapters)

Keywords

About this book

Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises.

Reviews

From the reviews:

"5 Stars: this book is well written and covers many of the aspects of DSP with FPGAs. I run a business that specializes exclusively in high performance DSP designs using FPGAs. This book pretty much covers it all, in fact it closely parallels the material we present in our DSP for FPGAs seminar. I very highly recommend this book."

Ray Andraka of Andraka Consultants, N. Kingstown, RI

"This second edition provides new material on the design of serial and array dividers, the description of a complete floating-point library, and adaptive filter design. Over 25 additional exercises as compared to the first edition are also included in the book. It is worth noting that there are two appendices on the Verilog source code … and furthermore a glossary of the abbreviations typical in the field are provided." (Zentralblatt MATH, Vol. 1050, 2005)

Authors and Affiliations

  • Dept. of Electrical and Computer Engineering, FAMU-FSU College Engineering, Florida State University, Tallahassee, USA

    Uwe Meyer-Baese

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