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Engineering - Signals & Communication | Digital Signal Processing with Field Programmable Gate Arrays

Digital Signal Processing with Field Programmable Gate Arrays

Meyer-Baese, Uwe

Originally published as a monograph

2nd ed. 2004, XVII, 527 p.

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Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises.

Content Level » Research

Keywords » Elektrische Schaltungen - FPGA - Flip-Flop - Hardwarebeschreibungssprache - Signals - VHDL - Verilog - adaptive Filter - coding - computer - digital signal processing - discrete Fourier transform - fast Fourier transform (FFT) - filters - signal processing

Related subjects » Electronics & Electrical Engineering - Hardware - Signals & Communication

Table of contents 

1. Introduction.- 2. Computer Arithmetic.- 3. Finite Impulse Response (FIR) Digital Filters.- 4. Infinite Impulse Response (IIR) Digital Filters.- 5. Multirate Signal Processing.- 6. Fourier Transforms.- 7. Advanced Topics.- 8. Adaptive Filters.- References.- A. Verilog Source Code.- B. VHDL and Verilog Coding.- B.1 List of Examples.- B.2 Library of Parameterized Modules (LPM).- B.2.1 The Parameterized Flip-flop Megafunction (lpm_ff).- B.2.2 The Parameterized Adder/Subtractor Megafunction (lpm_add_sub).- B.2.3 The Parameterized Multiplier Megafunction (lpm_mult).- B.2.4 The Parameterized ROM Megafunction (lpm_rom).- B.2.5 The Parameterized Divider Megafunction (lpm_divide).- C. Glossary.- D. CD-ROM File: “1readme.ps”.

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