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Routing Algorithms in Networks-on-Chip

  • Book
  • © 2014

Overview

Editors:
  1. Maurizio Palesi

    1. Facoltà di Ingegneria, Università degli Studi di Enna, 'Kore', Enna, Italy

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  2. Masoud Daneshtalab

    1. Department of IT, University of Turku, Turku, Finland

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  • Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems
  • Describes routing algorithms for NoC architectures at all abstraction levels, from the algorithmic level to actual implementation
  • Discusses the impact on NoC routing algorithms of key design objectives, such as power dissipation, energy consumption, thermal aspects, reliability, and performance

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Table of contents (14 chapters)

  1. Front Matter

    Pages i-xiv
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  2. Basic Concepts on On-Chip Networks

    • Masoud Danashtalab, Maurizio Palesi
    Pages 1-18

  3. Performance Improvement

    1. Front Matter

      Pages 19-19
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    2. A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs

      • Abbas Eslami Kiasari, Axel Jantsch, Zhonghai Lu
      Pages 21-39

    3. Run-Time Deadlock Detection

      • Ra’ed Al-Dujaily, Terrence Mak, Fei Xia, Alex Yakovlev, Maurizio Palesi
      Pages 41-68

    4. The Abacus Turn Model

      • Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li
      Pages 69-103

    5. Learning-Based Routing Algorithms for On-Chip Networks

      • Masoumeh Ebrahimi, Masoud Daneshtalab
      Pages 105-125

  4. Multicast Communication

    1. Front Matter

      Pages 127-127
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    2. Efficient and Deadlock-Free Tree-Based Multicast Routing Methods for Networks-on-Chip (NoC)

      • Faizal Arya Samman, Thomas Hollstein
      Pages 129-159

    3. Path-Based Multicast Routing for 2D and 3D Mesh Networks

      • Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
      Pages 161-189

  5. Fault Tolerance and Reliability

    1. Front Matter

      Pages 191-191
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    2. Fault-Tolerant Routing Algorithms in Networks On-Chip

      • Reyhaneh Jabbarvand Behrouz, Mehdi Modarressi, Hamid Sarbazi-Azad
      Pages 193-210

    3. Reliable and Adaptive Routing Algorithms for 2D and 3D Networks-on-Chip

      • Masoumeh Ebrahimi
      Pages 211-237

  6. Power/Energy and Thermal Issues

    1. Front Matter

      Pages 239-239
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    2. Bufferless and Minimally-Buffered Deflection Routing

      • Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, Onur Mutlu
      Pages 241-275

    3. A Thermal Aware Routing Algorithm for Application-Specific Network-on-Chip

      • Zhiliang Qian, Chi-Ying Tsui
      Pages 277-304

  7. Emerging Technologies

    1. Front Matter

      Pages 305-305
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    2. Traffic- and Thermal-Aware Routing Algorithms for 3D Network-on-Chip (3D NoC) Systems

      • Kun-Chih Chen, Chih-Hao Chao, Shu-Yen Lin, An-Yeu (Andy) Wu
      Pages 307-338

    3. Scalable Architecture for All-Optical Wavelength-Routed Networks-on-Chip

      • Somayyeh Koohi, Shaahin Hessabi
      Pages 339-375

  8. Industrial Case Study

    1. Front Matter

      Pages 377-377
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Keywords

About this book

This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.

Editors and Affiliations

  • Facoltà di Ingegneria, Università degli Studi di Enna, 'Kore', Enna, Italy

    Maurizio Palesi

  • Department of IT, University of Turku, Turku, Finland

    Masoud Daneshtalab

Bibliographic Information

  • Book Title: Routing Algorithms in Networks-on-Chip

  • Editors: Maurizio Palesi, Masoud Daneshtalab

  • DOI: https://doi.org/10.1007/978-1-4614-8274-1

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science+Business Media New York 2014

  • Hardcover ISBN: 978-1-4614-8273-4

  • Softcover ISBN: 978-1-4939-5511-4

  • eBook ISBN: 978-1-4614-8274-1

  • Edition Number: 1

  • Number of Pages: XIV, 410

  • Number of Illustrations: 122 b/w illustrations, 97 illustrations in colour

  • Topics: Circuits and Systems, Processor Architectures, Electronics and Microelectronics, Instrumentation

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